Patent classifications
H10P14/36
Method for manufacturing semiconductor silicon wafer composed of silicon wafer substrate and silicon monocrystalline epitaxial layer
Provided is a method for manufacturing a semiconductor silicon wafer capable of inhibiting P-aggregation defects (SiP defects) and SF in an epitaxial layer. The method includes a step of forming a silicon oxide film with a thickness of at least 300 nm or thicker only on the backside of the silicon wafer substrate by the CVD method at a temperature of 500 C. or lower after the step of forming the silicon oxide film, a step of heat treatment where the substrate is kept in an oxidizing atmosphere at a constant temperature of 1100 C. or higher and 1250 C. or lower for 30 minutes or longer and 120 minutes or shorter after the heat treatment, a step of removing surface oxide film formed on the front surface of the substrate, and a step of depositing a silicon monocrystalline epitaxial layer on the substrate after the step of removing the surface oxide film.