H10P14/20

Semiconductor laminate, semiconductor device, and method for manufacturing semiconductor device
12593625 · 2026-03-31 · ·

A semiconductor laminate at least including: a base; a buffer layer; and a crystalline metal oxide semiconductor film containing at least one metal element and having a corundum structure, the semiconductor laminate having the buffer layer on a main surface of the base directly or via another layer, the semiconductor laminate having the crystalline metal oxide semiconductor film on the buffer layer. The buffer layer is a laminate structure of a plurality of buffer films each with a different composition, and at least two buffer films of the plurality of buffer films have a film thickness of 200 nm or more and 650 nm or less.

Method of fabricating void-free conductive feature of semiconductor device

The present application provides a method of fabricating a conductive feature. The method of fabricating the conductive feature includes steps of depositing an insulative layer on a substrate, forming a trench in the insulative layer, performing a cyclic process comprising a sequence of a deposition step and a removal step to deposit a conductive material in the trench until the deposition step has been performed is equal to a first preset number of times and a number of the times the removal step has been performed is equal to a second preset number of times, and filling the trench with the conductive material after the cyclic process.

Method for preparing silicon-on-insulator

In a method for preparing silicon-on-insulator, the first etching stop layer, the second etching stop layer, and the device layer are formed bottom-up on the p-type monocrystalline silicon epitaxial substrate, where the first etching stop layer is made of intrinsic silicon, the second etching stop layer is made of germanium-silicon alloy, and the device layer is made of silicon. After oxidation, bonding, reinforcement, and grinding treatment, selective etching is performed. Through a first selective etching to p+/intrinsic silicon, the thickness deviation of the first etching stop layer on the second etching layer is controlled within 100 nm, and then through the second etching and the third etching, the thickness deviation and the surface roughness of the finally prepared silicon-on-insulator film can be optimized to less than 5 nm and less than 4 , respectively, so as to realize the flatness of the silicon-on-insulator film.

Semiconductor device comprising oxide semiconductor

A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.

SUBSTRATE FOR FORMING SEMICONDUCTOR DEVICE, SEMICONDUCTOR LAMINATED STRUCTURE, SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SUBSTRATE FOR FORMING SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR LAMINATED STRUCTURE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
20260096168 · 2026-04-02 ·

A substrate (1) for a semiconductor device of the present invention includes a diamond substrate (10) and a silicon carbide layer (20) located on a part or all of one surface (10a) of the diamond substrate (10), wherein the silicon carbide layer (20) has a thickness of 20 nm or less, and wherein a surface (20a) of the silicon carbide layer (20) has an arithmetic mean roughness Ra of 0.5 nm or less.

Method for producing a continuous nitride layer

The invention relates to a method for obtaining a layer at least partially made of a nitride (N), first comprising the provision of a stack comprising at least one assembly of pads (1000A1-1000B4) extending from a substrate (100). Each pad comprises at least one creep section (220A1-220A5) and one crystalline section (300A1,300A5) surmounting the creep section (200A1-200A5). Then, a crystallite (510A1-510A5) is epitaxially grown on at least some of said pads until coalescence of the crystallites, so as to form a nitride layer (550A). The pads of the assembly are distributed over the substrate, such that the relative arrangement of the pads of the assembly is such that during the epitaxy of the crystallites, the progressive coalescence of the crystallites is always done between, on the one hand, a crystallite or a plurality of coalesced crystallites and, on the other hand, an isolated crystallite.

Method of forming conductive member and method of forming channel

A method of forming conductive member includes: forming, on substrate, first portion containing first element constituting the conductive member to be obtained and second element causing eutectic reaction with the first element, and second portion containing third element constituting intermetallic compound with the second element; crystallizing primary crystals of the first element by adjusting temperature of the substrate after bringing the first portion into liquid phase state; growing crystal grains of the first element by diffusing the second element from the first portion into the second portion to increase ratio of the first element in crystal state to the first and second elements in the liquid phase state in the first portion while maintaining the temperature of the substrate at the same temperature; and turning the first portion, after completing diffusion of the second element into the second portion, into the conductive member having crystal grains of the first element.

Super-junction MOSFET/IGBT with MEMS layer transfer and WBG drain

A semiconductor device has a substrate made of a first semiconductor material. The first semiconductor material is silicon carbide. A first semiconductor layer made of the first semiconductor material is disposed over the substrate. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The second semiconductor material is silicon. A third semiconductor layer made of the second semiconductor material can be disposed between the first semiconductor layer and second semiconductor layer. A semiconductor device is formed in the second semiconductor layer. The semiconductor device can be a power MOSFET or diode. The second semiconductor layer with the electrical component provides a first portion of a breakdown voltage for the semiconductor device and the first semiconductor layer and substrate provide a second portion of the breakdown voltage for the semiconductor device.

SYSTEMS AND METHODS FOR PROCESSING A SILICON SURFACE USING MULTIPLE RADICAL SPECIES

A method of processing a silicon surface includes using a first radical species to remove contamination from the surface and to roughen the surface; and using a second radical species to smooth the roughened surface. Reaction systems for performing such a method, and silicon surfaces prepared using such a method, also are provided.

Method for manufacturing group III nitride semiconductor substrate

A method for manufacturing a group III nitride semiconductor substrate, that includes: growing a first AlN buffer layer on an Si substrate at a first growth temperature; growing a second AlN buffer layer on the first AlN buffer layer at a second growth temperature higher than the first growth temperature; and growing a group III nitride semiconductor layer on the second AlN buffer layer, wherein an Al raw material and an N raw material are alternately repeatedly fed in the growing the first AlN buffer layer.