A substrate, a first layer disposed on the substrate, and a second layer disposed on the first layer are provided. An opening is etched through the second layer to the first layer. A first portion of the first layer is etched through the opening using a first etchant, to expose a surface of the substrate through the opening. A feature is deposited on the surface of the substrate through the opening. A second portion of the first layer is etched using a gaseous etchant, to release the substrate from the second layer.

A method of fabricating semiconductor fins, including, patterning a film stack to produce one or more sacrificial mandrels having sidewalls, exposing the sidewall on one side of the one or more sacrificial mandrels to an ion beam to make the exposed sidewall more susceptible to oxidation, oxidizing the opposite sidewalls of the one or more sacrificial mandrels to form a plurality of oxide pillars, removing the one or more sacrificial mandrels, forming spacers on opposite sides of each of the plurality of oxide pillars to produce a spacer pattern, removing the plurality of oxide pillars, and transferring the spacer pattern to the substrate to produce a plurality of fins.

A method of providing access to a contact pad located on a base polyimide layer of an electronic part comprises (i) covering the contact pad and the base polyimide layer with a cover layer comprised of a metallic mask layer, a polyimide layer, and an adhesive layer. The adhesive layer attaches the cover layer to the contact pad and the base polyimide layer. The metallic mask layer is exposed. The method further includes (ii) removing a portion of the metallic mask layer of the cover layer directly above the contact pad, and (iii) through the removed portion of the metallic mask layer, using a plasma-etching process to create an access opening to the contact pad through the polyimide layer and the adhesive layer.

Provided is a composition for forming an organic film which has both embedding and planarization properties, and a method for forming an organic film and a patterning process using the composition. A composition for forming an organic film, containing: (A) an aromatic ring-containing resin; (B) a polymer containing a repeating unit containing a -diketone structure represented by the following formula (1):

##STR00001## wherein L.sub.1 is a saturated or unsaturated linear or branched divalent hydrocarbon group having 2 to 20 carbon atoms, R.sub.A and R.sub.B each are a hydrogen atom, a substituted or unsubstituted linear alkyl group having 1 to 20 carbon atoms, a substituted or unsubstituted branched or cyclic alkyl group having 3 to 20 carbon atoms, a substituted or unsubstituted aliphatic unsaturated hydrocarbon group having 2 to 20 carbon atoms and containing one or more double or triple bonds, a substituted or unsubstituted heteroalkyl group having 1 to 30 carbon atoms, a substituted or unsubstituted aryl group having 6 to 30 carbon atoms, a thiol group, a hydroxy group, an amino group, a carboxy group, or a halogen group; and (C) a solvent.

A method for manufacturing a semiconductor substrate, includes: applying an underlayer film-forming composition directly or indirectly to a substrate to form an underlayer film; applying a composition for forming a metal-containing resist film to the underlayer film to form a metal-containing resist film; exposing the metal-containing resist film to extreme ultraviolet rays; and developing the exposed metal-containing resist film. The underlayer film-forming composition includes: a compound including at least one structural unit selected from the group consisting of a structural unit (-1) represented by formula (1-1) and a structural unit (-2) represented by formula (1-2). X is a monovalent aliphatic hydrocarbon group having 1 to 20 carbon atoms or a monovalent aliphatic hydrocarbon group having 1 to 20 carbon atoms substituted with at least one halogen atom. Y is a monovalent organic group having 1 to 20 carbon atoms, a hydroxy group, or a halogen atom.

##STR00001##

Provided are a hard mask including an amorphous boron nitride film and a method of fabricating the hard mask, and a patterning method using the hard mask. The hard mask is provided on a substrate and used for a process of patterning the substrate, and the hard mask includes an amorphous boron nitride film.

A method of manufacturing a semiconductor device including forming a target layer, forming a pre-modification carbon layer over the target layer, modifying and patterning the pre-modification carbon layer to form a post-modification carbon mask pattern by performing a modification process and a patterning process, and forming trenches in the target layer by performing an etching process using the post-modification carbon mask pattern as an etching mask.

Methods for the fabrication of semiconductor devices are disclosed. A method may include depositing a mask layer on a substrate, forming a protection layer on the mask layer, and modifying the protection layer such that a porosity of the protection layer is reduced. Modifying the protection layer may include densifying the protection layer. Modifying the protection layer may include reducing the protection layer using a hydrogen plasma. The method may include etching the protection layer and the substrate. Etching may include etching, forming the protection layer, and modifying the protection layer in a predetermined number of cycles.

A wet etching chemistry to selectively remove a polymer residue on an opening embedded in a low-k dielectric layer and an underlying stop layer in a process of forming an interconnect structure is provided. The wet etching chemistry includes: two type of organic solvents, wherein a concentration of the two type of organic solvents is greater than or equal to 70%; an Alkali source amine, at least comprising a tertiary amine; an inhibitor; and water. In some embodiment, the wet etching chemistry is free of a peroxide to avoid damage to the WdC hard mask.

A device includes a semiconductor substrate, and a plurality of semiconductor fins parallel to each other, wherein the plurality of semiconductor fins is a portion of the semiconductor substrate. A Shallow Trench Isolation (STI) region is on a side of the plurality of semiconductor fins. The STI region has a top surface and a non-flat bottom surface, wherein the plurality of semiconductor fins is over the top surface of the STI region.