First lithography and etching are carried out on a semiconductor structure to provide a first intermediate semiconductor structure having a first set of surface features corresponding to a first portion of desired fin formation mandrels. Second lithography and etching are carried out on the first intermediate structure, using a second mask, to provide a second intermediate semiconductor structure having a second set of surface features corresponding to a second portion of the mandrels. The second set of surface features are unequally spaced from the first set of surface features and/or the features have different pitch. The fin formation mandrels are formed in the second intermediate semiconductor structure using the first and second sets of surface features; spacer material is deposited over the mandrels and is etched back to form a third intermediate semiconductor structure having a fin pattern. Etching is carried out on same to produce the fin pattern.

A material for forming an organic film, containing: (A) compound represented by formula (1A); and (B) organic solvent, where W.sub.1 represents n1-valent organic group, n1 represents integer of 2 to 4, X.sub.1 represents group represented by formula (1B), n2 represents 1 or 2, and R.sub.1 represents any group represented by formulae (1C). A compound for forming organic film that cures under film formation conditions in inert gas as well as in air, and makes it possible to form organic film that has heat resistance, properties of filling and planarizing pattern formed in substrate, and favorable film-formability on and adhesiveness to substrate; material for forming organic film, containing compound; substrate for manufacturing semiconductor device including material; method for forming organic film, using material; patterning process using material; and aromatic carboxylic anhydride having crosslinkable moiety, expected to be an industrially useful raw material such as electronic materials and aerospace materials.

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The disclosure provides a method of patterning a semiconductor structure. A first composite substrate including first spacers on a first substrate and a second composite substrate including second spacers on a second substrate are received. The second composite substrate is disposed on the first composite substrate, in which at least one of the first spacers is in direct contact with at least one of the second spacers. Spaces between the first spacers and the second spacers are filled with a directed self-assembly material, in which the directed self-assembly material includes first portions between the first spacers and the second substrate, second portions between the second spacers and the first substrate, and third portions being remaining portions. The second composite substrate, the first spacers, and the first portions and the second portions are removed. Oxide layers are filled between the third portions. The third portions are removed.

A method of manufacturing a semiconductor device includes forming a gate oxide layer on a substrate, where the substrate includes a high voltage region and a low voltage region. The gate oxide layer is disposed in the high voltage region. Wet etching is performed on the gate oxide layer to reduce a thickness of the gate oxide layer. Multiple trenches are formed around the high voltage region in the substrate, where forming the trenches includes removing an edge of the gate oxide layer to make the thickness of the gate oxide layer uniform. An insulating material is filled in the trenches to form multiple shallow trench isolation structures, where an upper surface of the shallow trench isolation structures close to the edge of the gate oxide layer is coplanar with an upper surface of the gate oxide layer.

A manufacturing method of a semiconductor device includes depositing a first bilayer structure over a substrate, in which the first bilayer structure includes a silicon oxide layer and a silicon nitride layer over the silicon nitride layer; forming a first carbonaceous hard mask on the first bilayer structure; forming a second bilayer structure on the first carbonaceous hard mask; forming a mask stack of alternating anti-reflecting coating (ARC) hard masks and second carbonaceous hard masks on the second bilayer structure; and coating a photoresist on the mask stack.

A method for fabricating a semiconductor device includes forming a lower layer including a metal element on an upper surface of a substrate; forming a photoresist layer on an upper surface of the lower layer; forming a first exposure region and a second exposure region by exposing a photoresist layer portion, and a lower layer portion beneath the first exposure region, respectively, and forming a non-exposure region of unexposed photoresist layer; providing electrons from the second exposure region to a portion of the non-exposure region adjacent to a sidewall of the first exposure region; forming a third exposure region by exposing the portion of the non-exposure region, and forming a photoresist pattern including the first and third exposure regions by etching the non-exposure region; wherein an upper surface width of the first exposure region is greater than a bottom surface width of the first exposure region.

A photoresist composition is provided including an organometallic compound, an additive, and a solvent, and the additive may include compounds represented by Chemical Formula 1 and Chemical Formula 2:

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Methods of making the photoresist composition and methods of manufacturing semiconductor devices comprising the photoresist composition are also provided.

A method for forming a semiconductor structure includes providing a base containing a first area and a second area; patterning a first core material layer and forming first core layers; forming first spacers; patterning a second core material layer and forming second core layers; forming second spacers covering sidewalls of the second core layers; forming a second protective layer; patterning the second core layers using the second protective layer as a mask and forming third core layers; and patterning a target material layer using the second spacers and the third core layers as a mask and forming first target structures and second target structures. A pitch between adjacent first target structures is smaller than or equal to a pitch between adjacent second target structures. The present invention achieves simultaneous arrangement of SAQP and SALELE processes and improves design flexibility in patterning.

A method for manufacturing a semiconductor device includes: forming a patterned hard mask on a patterned structure disposed on a substrate, such that a hard mask portion of the patterned hard mask is disposed on a fin portion of the patterned structure; and laterally trimming the hard mask portion by a lateral etching process. The lateral etching process includes a radical etching process and a chemical etching process. Alternatively, the lateral etching process includes a radical etching process, a plasma etching process, or a combination thereof, and a cleaning process.

The present application discloses a fabrication method for a U-trench. A photoresist retained on field oxygen in an X-direction photolithography process of the U-trench will protect a hard mask on the field oxygen of a Y-direction opening in a non-U-trench area without causing the loss of the hard mask on the field oxygen of the Y-direction opening in the non-U-trench area. In a process of forming the U-trench by X-direction silicon etching, silicon at the X-direction opening at a non-overlapping position of an X-direction opening pattern and a Y-direction opening pattern is protected by a first silicon oxide layer of mask and a second silicon nitride layer of mask. When the mask on the field oxygen is removed, the first silicon oxide layer is removed after the second silicon nitride layer of mask is removed, which will not damage the SIN hard mask on the field oxygen.