An apparatus includes a printed circuit board (PCB), a solder pad, a signal via, a plurality of metalized vias, and a waveguide. The PCB has a first surface opposite a second surface and includes a first metal layer, a second metal layer having a waveguide opening, and a PCB channel region from the waveguide opening in the second metal layer to the second surface. The solder pad is positioned on the first surface of the PCB over the channel region, and the signal via is coupled to the solder pad and a via pad in the second metal layer within the waveguide opening. The plurality of metalized vias extend from the first surface to the second surface of the PCB and form a boundary around the channel region. The waveguide is affixed to the waveguide opening in the second metal layer.

In a described example, an apparatus includes: a semiconductor device mounted to a device side surface of a package substrate, the package substrate having a board side surface opposite the device side surface; an antenna module mounted to the package substrate and coupled to the semiconductor device; and mold compound covering the semiconductor device and a portion of the package substrate.

Embodiments of the invention include a microelectronic device that includes a first substrate having radio frequency (RF) components and a second substrate that is coupled to the first substrate. The second substrate includes a first conductive layer of an antenna unit for transmitting and receiving communications at a frequency of approximately 4 GHz or higher. A mold material is disposed on the first and second substrates. The mold material includes a first region that is positioned between the first conductive layer and a second conductive layer of the antenna unit with the mold material being a dielectric material to capacitively couple the first and second conductive layers of the antenna unit.

Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate and the components are connected with conductive material in preformed holes in dielectric material in the bond lines aligned with TSVs of the devices and the exposed conductors of the substrate. Methods of fabrication are also disclosed.

The present disclosure provides a semiconductor device package including a first substrate and an adhesive layer. The first substrate has a first surface and a conductive pad adjacent to the first surface. The conductive pad has a first surface exposed from the first substrate. The adhesive layer is disposed on the first surface of the first substrate. The adhesive layer has a first surface facing the first substrate. The first surface of the adhesive layer is spaced apart from the first surface of the conductive pad in a first direction substantially perpendicular to the first surface of the first substrate. The conductive pad and the adhesive layer are partially overlapping in the first direction.

A wireless communication system includes a plurality of antennas, and a plurality of RF chips, arranged in a row and coupled to the antennas, for providing a plurality radio-frequency (RF) output signals to the antennas according to an RF signal. The wireless communication system also includes a transmission line arranged to be a straight line in parallel to the row, and to connect to the RF chips, and a resistive load, coupled to a first end of the transmission line. A second end of the transmission line is arranged to receive the RF signal.

A packaging device is provided. The packaging device includes a die disposed over a laminate, the die comprising a first via structure, and an interposer disposed between the die and the laminate. The interposer includes a second via structure. The packaging device also includes a lid disposed over the interposer and covering the die, a first patterned conductive layer disposed between the die and the interposer, and between the lid and the interposer; and a second patterned conductive layer disposed between the laminate and the interposer. The first patterned conductive layer includes a bonding structure electrically and thermally connected to the first via structure and the second via structure.

An antenna package structure includes a substrate, a communication device, and a shielding layer. The substrate has an upper portion and a lower portion. The lower portion includes an antenna layer. The substrate has stepped sidewalls on opposite sides, and each of the stepped sidewalls includes a sidewall of the upper portion and a sidewall of the lower portion. The communication device is attached to the upper portion of the substrate. The shielding layer covers the communication device and the sidewall of the upper portion of the substrate.

A package includes a substrate, a conductive layer on a first surface of the substrate forming a set of antennas, and a semiconductor die forming communication channels for the antennas, each of the communication channels being electrically coupled to the antennas by way of a redistribution layer that includes the substrate, the semiconductor die being mounted on either the first surface or an opposing second surface of the substrate. The package further includes a set of electrical contacts on the second surface of the substrate, the redistribution layer further coupling the set of electrical contacts to the semiconductor die. The package further includes a stiffening layer over the first surface of the substrate, the stiffening layer forming gaps over the antennas such that the antennas are on an outer surface of the package.

The present invention is an IC module including: a substrate having a through hole; a contact terminal provided on a first surface of the substrate; an IC chip provided on a second surface of the substrate; a holding portion fixed to the substrate and projecting from the substrate; and a fingerprint sensor fixed to the holding portion, wherein the contact terminal is electrically connected to the IC chip via the through hole, and the fingerprint sensor is electrically connected to the IC chip via the holding portion.