A semiconductor device according to the present embodiment includes a structural body and a light blocker. At a measurement site that is irradiated with measurement light to measure a structure of the structural body, the light blocker is provided at a position farther than the structural body in an advancing direction of the measurement light with which irradiation is performed, and the light blocker blocks the measurement light. The light blocker includes first metal layers in two or more layers.

A semiconductor chip including a plurality of first pads, a plurality of second pads, a plurality of first bumps, and a plurality of second bumps is provided. The first pads and the second pads are arranged along a direction of a long side of an active surface of the semiconductor chip. The first bumps are disposed on the first pads, and configured for a chip probe test. The second bumps are disposed on the second pads, and not for the chip probe test. A size of the first bump is larger than a size of the second bump.

Provided is a semiconductor device, including: a protective film provided above a front surface of a semiconductor substrate; and a front surface electrode provided above the front surface of the semiconductor substrate; where the front surface electrode includes: a plurality of bonding regions exposed through a plurality of opening portions provided in the protective film; and a plurality of testing regions for testing, and where in a top view of the semiconductor substrate, an area of each testing region is smaller than an area of each bonding region. Furthermore, provided is a semiconductor module including a semiconductor device.

A display device includes a circuit substrate, light-emitting diodes, a bank structure, and light-transmission structures. The circuit substrate includes first sub-pixel areas, wherein each first sub-pixel area includes a placement area and a repair area. At least one corresponding light-emitting diode is disposed on at least one of the placement area and the repair area of each first sub-pixel area. The bank structure is located above the circuit substrate and has second sub-pixel areas. The first sub-pixel areas are overlapped with the second sub-pixel areas respectively. Each second sub-pixel area includes a preset opening and a repair opening. The preset openings are overlapped with the placement areas, and the repair openings are overlapped with the repair areas. The light-transmission structures are disposed in the second sub-pixel areas. Each light-transmission structure is disposed in one corresponding preset opening or in one corresponding repair opening.

An apparatus for treating a substrate includes a process chamber having a process space, a support unit that supports the substrate in the process space, a lift pin module having a lift pin that moves a consumable component on the support unit in an up/down direction, and a measurement unit that measures a degree of wear of the consumable component and has a light receiving member that receives light emitted in a horizontal direction.

According to one embodiment, a semiconductor device includes a first structure, a first columnar body extending in a first direction in the first structure, a second structure, a second columnar body extending in the first direction in the second structure, and a bonding surface interposed between the first structure and the second structure. The first columnar body and the second columnar body are connected through the bonding surface in the first direction.

The present disclosure provides a semiconductor structure, a method of manufacturing the semiconductor structure and a system for manufacturing the semiconductor structure. The method includes several operations. A substrate including a device region and a scribe line region is provided. A first layer is formed over the substrate. A first photoluminescent layer is formed over the first layer in the scribe line region. The first layer and the first photoluminescent layer are patterned to form a first pattern in the scribe line region. A first patterned mask layer is formed over a second layer. An alignment of the first patterned mask layer with the first pattern is detected. A pattern of the first patterned mask layer is transferred to the second layer to form a second pattern in the scribe line region.

A display panel and a preparation method thereof, and a display device. The display panel includes a display main body, which includes a display area and an encapsulation area, and the display panel further has deformation detection elements, including: an electro-display module having one or more electro-display units, and a piezoelectric module positioned on a surface of at least one deformable functional layer in the display main body, and positioned in the encapsulation area. The piezoelectric module includes two or more piezoelectric units disposed at intervals on the surface of the deformable functional layer, and a voltage difference is applied between two adjacent piezoelectric units. An electro-display unit is connected in series between the two adjacent piezoelectric units. The display panel can detect in real time whether deformation occurs through the deformation detection means, thereby ensuring the encapsulation quality and display effect.

A semiconductor device according to an embodiment of the present disclosure includes a guard area, a chip area surrounded by the guard area, and a circuit structure including bonding pads coupled in series in the chip area. A semiconductor device according to an embodiment of the present disclosure includes a chip area, chip guards surrounding the chip area and spaced apart from each other, and a circuit structure including bonding pads coupled in series between the chip guards.

A semiconductor device includes a semiconductor wafer, an antenna element and a radio frequency (RF) transponder. The semiconductor wafer includes a plurality of regions. Each region includes one or more dies. The antenna element is disposed in one of the regions where a device under test (DUT) is disposed. The antenna element is arranged to couple an RF signal into an electrical signal. The RF transponder is disposed in the one of the regions, and coupled to the antenna element and the DUT. The RF transponder is configured to send a stimulus signal to the DUT in response to the electrical signal, and drive the antenna element to output a modulated RF signal according to a response signal received from the DUT. The response signal is generated from the DUT in response to the stimulus signal. The modulated RF signal is indicative of a behavior of the DUT.