An integrated circuit package may be fabricated with a universal dummy device, instead of utilizing a dummy device that matches the bump layer of an electronic substrate of the integrated circuit package. In one embodiment, the universal dummy device may comprise a device substrate having an attachment surface and a metallization layer on the attachment surface, wherein the metallization layer is utilized to form a connection with the electronic substrate of the integrated circuit package. In a specific embodiment, the metallization layer may be a single structure extending across the entire attachment surface. In another embodiment, the metallization layer may be patterned to enable gap control between the universal dummy device and the electronic substrate.

An isolation structure, comprising: an isolation material layer, filled in a trench of a substrate; and a protection layer, having two portions extending from a topmost surface of the substrate to a top surface of the isolation material layer across boundaries of the trench, and covering opposite edges of the isolation material layer, wherein the two portions of the protection layer are laterally spaced apart from each other, and the protection layer has an etching selectivity with respect to the isolation material layer.

An isolation structure, comprising: an isolation material layer, filled in a trench of a substrate; and a protection layer, having two portions extending from a topmost surface of the substrate to a top surface of the isolation material layer across boundaries of the trench, and covering opposite edges of the isolation material layer, wherein the two portions of the protection layer are laterally spaced apart from each other, and the protection layer has an etching selectivity with respect to the isolation material layer.

The embodiments herein relate to transistors having varying thicknesses of gate dielectric layers. The transistor includes a gate dielectric layer between a gate electrode and a substrate. The gate dielectric layer includes a first dielectric portion on the substrate, a second dielectric portion at least partially in the substrate, and a third dielectric portion partially in the substrate between the first and second dielectric portions. The second dielectric portion is thicker than the first dielectric portion. The third dielectric portion is thicker than the first dielectric portion and thinner than the second dielectric portion.