A semiconductor device includes a substrate, a first electrode and a second electrode. The semiconductor device includes a MOSFET that has the first electrode as a drain electrode and the second electrode as a source electrode. The first electrode has a layer region provided on a first main surface and a first region extending from the first main surface into the substrate in a first direction from the first electrode to the second electrode. A lower surface of the first electrode protrudes in a direction opposite to the first direction.

A method of making an electronics package for an electrical power module includes positioning a base plate into an electrolyte solution such that a first metallic layer of the base plate directly contacts the electrolyte solution. The method also includes positioning a deposition anode array into the electrolyte solution such that a gap is established between the first metallic layer and the deposition anode array. The method further includes connecting the first metallic layer to a power source and connecting the deposition anode array to the power source. The method also includes transmitting electrical energy from the power source through the deposition anode array, through the electrolyte solution, and to the first metallic layer, such that material is deposited onto the first metallic layer and forms an electrical connection pillar, an electrical-component retention feature, and an encapsulant retention feature of the electronics package.

An electrical power module includes a base plate, including an electrically isolating substrate and a first metallic layer formed on a first side of the electrically isolating substrate. The electrical power module also includes electrical connection pillars extending from the first metallic layer. The electrical power module further includes at least one encapsulant retention feature extending from the first metallic layer and including at least one surface that is angled or parallel relative to the first side of the electrically isolating substrate and faces the first side of the electrically isolating substrate. The electrical power module additionally includes at least one electrical component electrically coupled with the metallic layer of the base plate. The electrical power module further includes an encapsulant encapsulating the at least one electrical component, the metallic layer, and the at least one encapsulant retention feature and partially encapsulating the electrical connection pillars.

Conditions at the perimeter of the wafer may be characterized and used to adjust current stolen by the weir thief electrodes during a plating process to generate more uniform film thicknesses. An electrode may be positioned in a plating chamber near the periphery of the wafer as the wafer rotates. To characterize the electrical contacts on the seal, a wafer with a seed layer may be loaded into the plating chamber, and a constant current may be driven through the electrode into the conductive layer on the wafer. As an electrical characteristic of this current varies, such as a voltage required to drive a constant current, a mapping characterizing the seal quality or the openings in the mask layer may be generated.

A microelectronic structure with through substrate vias (TSVs) and method for forming the same is disclosed. The microelectronic structure can include a bulk semiconductor with a via structure. The via structure can have a first and second conductive portion. The via structure can also have a barrier layer between the first conductive portion and the bulk semiconductor. The structure can have a second barrier layer between the first and second conductive portions. The second conductive portion can extend from the second barrier layer to the upper surface of the bulk semiconductor. The microelectronic structure containing TSVs is configured so that the microelectronic structure can be bonded to a second element or structure.

A method of manufacturing a device includes forming a conductive film on a second surface of a substrate having a first surface and the second surface opposite to the first surface by using a non-superconducting material, forming a through hole penetrating the substrate by etching the substrate from the first surface after forming the conductive film, forming a through electrode in the through hole by using a superconducting material by an electroplating method using the conductive film exposed in the through hole as a seed layer, and removing the conductive film after forming the through electrode.

A microelectronic structure with through substrate vias (TSVs) and method for forming the same is disclosed. The microelectronic structure can include a bulk semiconductor with a via structure. The via structure can have a first and second conductive portion. The via structure can also have a barrier layer between the first conductive portion and the bulk semiconductor. The structure can have a second barrier layer between the first and second conductive portions. The second conductive portion can extend from the second barrier layer to the upper surface of the bulk semiconductor. The microelectronic structure containing TSVs is configured so that the microelectronic structure can be bonded to a second element or structure.

Methods and apparatus for electroplating a substrate incorporate aspects of digital lithography and feedback from electroplating processes to improve characteristics of plating material based on die patterns. In some embodiments, a method of electroplating a substrate may include receiving a die design, forming a first lithographic pattern for a first substrate based on the die design, using a digital lithography process to pattern the first substrate with the first lithographic pattern, using an electroplating process to deposit material on the first substrate, using a metrology process to determine at least one parameter of the deposited material on the first substrate, and forming a second lithographic pattern from the first lithographic pattern for a second substrate based, at least in part, on the at least one parameter received directly from the metrology process on the first substrate by the digital lithographic process for the second substrate.

The present disclosure relates to an electroplating system including a first contact detection sensor and a second contact detection sensor disposed at a surface of a cone of the electroplating system. The first contact detection sensor detects a first resistance at a first contact between a substrate to be plated by the electroplating system and a first contact pin, the second contact detection sensor detects a second resistance at a second contact between the substrate and a second contact pin. A controller receives the first resistance and the second resistance, and determines the first contact and the second contact are not properly formed when a difference between the first resistance and the second resistance is not within a first predetermined resistance range, or the first resistance or the second resistance is not within a second predetermined resistance range.

A system for printing metal interconnects on a substrate includes an anode substrate. A plurality of anodes are arranged on one side of the anode substrate with a first predetermined gap between adjacent ones of the plurality of anodes. A first plurality of fluid holes have one end located between the plurality of anodes. A plurality of control devices is configured to selectively supply current to the plurality of anodes, respectively. The anode substrate is arranged within a second predetermined gap of a work piece substrate including a metal seed layer. A ratio of the second predetermined gap to the first predetermined gap is in a range from 0.5:1 and 1.5:1. An array controller is configured to energize selected ones of the plurality of anodes using corresponding ones of the plurality of control devices while electrolyte solution is supplied through the first plurality of fluid holes between the anode substrate and the work piece substrate.