Patent classifications
H10W80/163
SUBSTRATE BONDING DEVICE, SUBSTRATE BONDING SYSTEM INCLUDING THE SAME, AND SUBSTRATE BONDING METHOD USING THE SAME
A substrate bonding device including: a bonding chamber including (i) a loading region in which a lower substrate is loaded, (ii) a bonding region in which an upper substrate is bonded to the lower substrate, and (iii) an unloading region spaced from the loading region and unloading the lower substrate to which the upper substrate is bonded in an internal space; a plurality lower chucks configured to support the lower substrate, each lower chuck moveable to be sequentially disposed in the loading region, the bonding region, and the unloading region; and an upper chuck configured to support the upper substrate to face the lower substrate in the bonding region.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A method of manufacturing a semiconductor device includes forming a first metal pad in each of a plurality of first regions on a first substrate so that warpage is generated on the first substrate. The method further includes forming a second metal pad in each of a plurality of second regions on a second substrate via a predetermined pattern. The method further includes bonding, after forming the first metal pad and the second metal pad, the first substrate with the second substrate. Moreover, the method further includes: making a correction, at a time of forming the predetermined pattern in each of the plurality of second regions on the second substrate, to change a position of the predetermined pattern in each of the plurality of second regions in a direction of being closer to a center of the second substrate for a first direction and to change the position of the predetermined pattern in a direction of being farther from the center of the second substrate for a second direction.
BONDING APPARATUS AND BONDING METHOD
A bonding apparatus and a bonding method are provided. The bonding apparatus includes: a machine base, including a movable pick-up platform; and a laser interferometer assembly. The laser interferometer assembly includes: a first laser interferometer unit, configured to determine displacement information of the movable pick-up platform along a first direction; and a second laser interferometer unit, configured to determine displacement information of the movable pick-up platform along a second direction. Based on the displacement information along the first direction and the displacement information along the second direction, the laser interferometer assembly is further configured to determine coordinate information of the movable pick-up platform.
Stacked semiconductor device
A stacked semiconductor device is disclosed that includes a plurality of semiconductor dies. Each die has oppositely disposed first and second surfaces, with pads formed on each of the surfaces. A plurality of through-vias connect respective pads on the first surface to respective pads on the second surface. The through-vias include a first group of through-vias coupled to respective I/O circuitry on the semiconductor die and a second group of through-vias not coupled to I/O circuitry on the semiconductor die. The plurality of semiconductor dies are stacked such that the first group of through-vias in a first one of the plurality of semiconductor dies are aligned with respective ones of at least a portion of the second group of through-vias in a second one of the plurality of semiconductor dies.
MICROELECTRONIC DEVICES INCLUDING CRUCIFORM CONTACT STRUCTURES, AND RELATED METHODS AND ELECTRONIC SYSTEMS
A microelectronic device includes a first microelectronic device structure, a second microelectronic device structure bonded to the first microelectronic device structure, and cruciform contact structures at a bonding interface of the first microelectronic device structure and the second microelectronic device structure. The cruciform contact structures respectively include a first conductive bar and a second conductive bar bonded to the first conductive bar. The first conductive bar has a first rectangular shape, a major horizontal dimension of the first conductive bar oriented in a first direction. The second conductive bar has a second rectangular shape, a major horizontal dimension of the second conductive bar oriented in a second direction orthogonal to the first direction. Related methods and electronic systems are also described.
BONDED DIE STRUCTURES WITH IMPROVED DIE POSITIONING AND METHODS FOR FORMING THE SAME
Bonded die structures and methods of fabricating bonded die structures including improved positioning of the dies used to form the structures. Improved positioning may be achieved by providing non-linear alignment features around the periphery of the dies that may facilitate accurate positioning of the dies with respect to one or more alignment marks on the target structures on which the dies are placed. The non-linear alignment features may include features formed in the peripheral edges of the dies, such as indent portions extending inwardly from the peripheral edges of the dies and/or outward bulge portions extending outwardly from the peripheral edges of the dies. Alternatively, or in addition, the non-linear alignment features may be features formed in a seal ring structure of the dies. The non-linear alignment features may improve the accuracy of the positioning of the dies relative to alignment mark(s) on the target structures using optical detection systems.
Semiconductor device circuitry formed from remote reservoirs
This document discloses techniques, apparatuses, and systems for semiconductor device circuitry formed from remote reservoirs. A semiconductor assembly includes a first semiconductor die with a layer of dielectric material having an opening. The first semiconductor die further includes a reservoir of conductive material having a first portion located adjacent to the opening, a second portion remote from the opening, and a third portion coupling the first portion and the second portion. A second semiconductor die includes a layer of dielectric material and a contact pad corresponding to the opening. The reservoir of conductive material is heated to volumetrically expand the second portion into the third portion, the third portion into the first portion, and the first portion through the opening to form an interconnect electrically coupling the first semiconductor die and the second semiconductor die at the contact pad. In this way, a connected semiconductor device may be assembled.
Method for manufacturing semiconductor package
The present disclosure provides a method for manufacturing a semiconductor package. The method includes disposing a first semiconductor substrate on a temporary carrier and dicing the first semiconductor substrate to form a plurality of dies. Each of the plurality of dies has an active surface and a backside surface opposite to the active surface. The backside surface is in contact with the temporary carrier and the active surface faces downward. The method also includes transferring one of the plurality of dies from the temporary carrier to a temporary holder. The temporary holder only contacts a periphery portion of the active surface of the one of the plurality of dies.
Semiconductor package and method of manufacturing same
A semiconductor package includes; a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first semiconductor chip includes; a first substrate, a first bonding pad on a first surface of the first substrate, and a first passivation layer on the first surface of the first substrate exposing at least a portion of the first bonding pad. The second semiconductor chip includes; a second substrate, a second insulation layer on a front surface of the second substrate, a second bonding pad on the second insulation layer, a first alignment key pattern on the second insulation layer, and a second passivation layer on the second insulation layer, covering at least a portion of the first alignment key pattern, and exposing at least a portion of the second bonding pad, wherein the first bonding pad and the second bonding pad are directly bonded, and the first passivation layer and the second passivation layer are directly bonded.
Bonding alignment marks at bonding interface
Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a bonded structure includes a first bonding layer including a first bonding contact and a first bonding alignment mark, a second bonding layer including a second bonding contact and a second bonding alignment mark, and a bonding interface between the first bonding layer and the second bonding layer. The first bonding alignment mark is aligned with the second bonding alignment mark at the bonding interface, such that the first bonding contact is aligned with the second bonding contact at the bonding interface. The first bonding alignment mark includes a plurality of first repetitive patterns. The second bonding alignment mark includes a plurality of second repetitive patterns different from the plurality of first repetitive patterns.