In examples, a semiconductor package comprises a semiconductor die, a conductive terminal coupled to the semiconductor die, and a mold compound covering the semiconductor die and the conductive terminal. The mold compound has first and second portions, with the first portion being thicker than the second portion. The second portion extends along an edge of the mold compound and includes a cavity. The cavity has a floor and an elevated member on the floor, the elevated member extending lengthwise from a lateral surface of the first portion toward the second portion such that a line extending axially through the elevated member intersects a plane in which the lateral surface lies.

A semiconductor package and method are disclosed. In one example, the semiconductor package includes a package body. A first diepad is at least partially uncovered by the package body at the first main surface. A second diepad is at least partially uncovered by the package body at the first main surface. A first semiconductor chip is arranged on the first diepad. A second semiconductor chip is arranged on the second diepad. The semiconductor package further includes at least one lead protruding out of the package body at the side surface. A first groove and a second groove are formed in the first main surface. The method includes a method of making the semiconductor package.

Provided is a curable composition for inkjet and air cavity formation, the curable composition capable of forming a cured product layer having a high aspect ratio and capable of enhancing adhesiveness and sealability. A curable composition for inkjet and air cavity formation according to the present invention contains a photocurable compound having a (meth)acryloyl group or a vinyl group and having no cyclic ether group, and a thermosetting compound having no (meth)acryloyl group and having a cyclic ether group, in which a content of the thermosetting compound in 100 wt % of the curable composition for inkjet and air cavity formation is 5 wt % or more, and when a B-staged product is obtained by irradiating the curable composition for inkjet and air cavity formation with light having a wavelength of 365 nm at an illuminance of 2000 mW/cm.sup.2, a viscosity at 40 C. of the B-staged product is 2.510.sup.2 Pa.Math.s or more and 3.010.sup. Pa.Math.s or less.

A wafer-scale system in package structure includes: a silicon substrate; a plurality of functional sub-modules arranged in an array mounted on the upper surface of the silicon substrate; a warping and stress adjustment structure mounted on the upper surface of the silicon substrate at the edges of the functional sub-modules; a stress cushioning flexible member structure mounted on the upper surface of the silicon substrate at the corner heads of the functional sub-modules; edge dummy devices of different sizes mounted on the upper surface of the edge area of the silicon substrate outside the array of the functional sub-modules; and a molding layer located on the upper surface of the silicon substrate, covering the functional sub-modules, the warping and stress adjustment structure, the stress cushioning flexible member structure and edge dummy devices.

The present disclosure provides for packaging integrated circuits. In an example package, an adhesive is contained between a rear face of a chip and a front face of a carrier substrate when the chip is placed and attached on the carrier substrate. In this regard, the rear face of the chip has first blind holes and the front face of the carrier substrate has second blind holes defining housings used to contain the adhesive.

An electronic package module includes a circuit substrate, an electronic component and an encapsulation layer on the circuit substrate, a thermal conductive material inside a cavity of the encapsulation layer and a heat sink on the thermal conductive material. The electronic component has a top surface facing away from the circuit substrate is electronically connected to the circuit substrate. The encapsulation layer encapsulates the electronic component. The bottom surface of the cavity exposes the top surface of the electronic component. The thermal conductive material is at the top surface of the electronic component and has a first surface of the electronic component far away from the electronic component. The encapsulation layer has a second surface far away from the circuit substrate. The first surface is flush with the second surface. The thermal conductive material is between the electronic component and the heat sink.

A semiconductor device includes a substrate. A semiconductor die is disposed over the substrate. An encapsulant is deposited over the substrate and semiconductor die. A first trench is formed in the encapsulant over the semiconductor die. A second trench is formed completely through the encapsulant and substrate. A conductive layer is formed over the encapsulant and into the first trench and second trench.