A package structure and a manufacturing method thereof are disclosed. The structure includes at least one semiconductor die, a redistribution layer disposed on the at least one semiconductor die, and connectors there-between. The connectors are disposed between the at least one semiconductor die and the redistribution layer, and electrically connect the at least one semiconductor die and the redistribution layer. The redistribution layer includes a dielectric layer with an opening and a metallic pattern layer disposed on the dielectric layer, and the metallic pattern layer includes a metallic via located inside the opening with a dielectric spacer surrounding the metallic via and located between the metallic via and the opening.

A method of forming a semiconductor device includes the following steps. A die and a first through via aside the die are formed. An encapsulant is formed to encapsulate the die and the first through via, wherein the encapsulant is physically connected to a sidewall of the first through via and a sidewall of the die. A warpage controlling layer is formed over the encapsulant and the die. A first conductive connector is formed on the first through via to electrically connect to the first through via.

A method includes: forming an interposer die using a substrate, the interposer die including a plurality of conductive vias in the substrate; bonding the interposer die to a first redistribution layer (RDL); encapsulating the interposer die; forming a second RDL over the interposer die on a side opposite to the first RDL; bonding a first semiconductor die with one of the first RDL and the second RDL; and encapsulating the first semiconductor die.

A method includes dispensing sacrificial region over a carrier, and forming a metal post over the carrier. The metal post overlaps at least a portion of the sacrificial region. The method further includes encapsulating the metal post and the sacrificial region in an encapsulating material, demounting the metal post, the sacrificial region, and the encapsulating material from the carrier, and removing at least a portion of the sacrificial region to form a recess extending from a surface level of the encapsulating material into the encapsulating material.

A package structure includes an insulating encapsulation, a semiconductor die, and a redistribution circuit structure. The semiconductor die is encapsulated in the insulating encapsulation. The redistribution circuit structure includes conductive patterns, wherein the conductive patterns each comprise a first portion, at least one second portion, and at least one connecting portion. A first edge of the at least one connecting portion is connected to the first portion, and a second edge of the at least one connecting portion is connected to the at least one second portion, wherein the first edge is opposite to the second edge, and a length of the first edge is greater than a length of the second edge.

A semiconductor device having one or more tiered pillars and methods of manufacturing such a semiconductor device are disclosed. The semiconductor device may include redistribution layers, a semiconductor die, and a plurality of interconnection structures that operatively couple a bottom surface of the semiconductor die to the redistribution layers. The semiconductor device may further include one or more conductive pillars about a periphery of the semiconductor die. The one or more conductive pillars may be electrically connected to the redistribution layers and may each comprise a plurality of stacked tiers.