A method of preparing a semiconductor-on-insulator structure from a bonded structure including a handle substrate, a donor substrate including a cleave plane, and a dielectric layer positioned between the handle substrate and the donor substrate, the method includes cleaving the bonded structure at the cleave plane to form a cleaved structure including the handle substrate, the dielectric layer, and a device layer. The single crystal semiconductor device layer defines a damaged region at an exposed surface opposite the dielectric layer. The damaged region includes single crystal semiconductor material and extends a thickness from the exposed surface. The method also includes removing the damaged region from the cleaved structure using a clean-and-etch operation that includes contacting the exposed surface of the device layer with an alkaline solution at a temperature and for a duration sufficient to remove the damaged region and smoothing the device layer with the damaged region removed.

A method for forming an SOI substrate includes following operations. A first semiconductor layer, a second semiconductor layer and a third semiconductor layer are formed over a first substrate. A plurality of trenches and a plurality of recesses are formed in the first semiconductor layer, the second semiconductor layer and the third semiconductor layer. The plurality of trenches extend along a first direction, and the plurality of recesses extend along a second direction different from the first direction. The plurality of trenches and the plurality of recesses are sealed to form a plurality of voids. A device layer is formed over the first substrate. The devices layer is bonded to an insulator layer over a second substrate. The third semiconductor layer, the device layer the insulator layer and the second substrate are separated from the first semiconductor layer and the first substrate. The device layer is exposed.

A manufacturing method of a semiconductor structure includes the following steps. A first wafer is provided. The first wafer includes a first substrate and a first device layer. A second wafer is provided. The second wafer includes a second substrate and a second device layer. The second device layer is bonded to the first device layer. An edge trimming process is performed on the first wafer and the second wafer to expose a first upper surface of the first substrate and a second upper surface of the first substrate and to form a damaged region in the first substrate below the first upper surface and the second upper surface. The second upper surface is higher than the first upper surface. A first photoresist layer is formed. The first photoresist layer is located on the second wafer and the second upper surface and exposes the first upper surface and the damaged region. The damaged region is removed by using the first photoresist layer as a mask. The first photoresist layer is removed.