H10W44/255

LAYOUT SCHEME FOR METAL-INSULATOR-METAL CAPACITORS
20260018541 · 2026-01-15 ·

Aspects and embodiments disclosed herein include a semiconductor device comprising a metal-insulator-metal capacitor having a capacitance. The metal-insulator-metal capacitor comprises a plurality of metal-insulator-metal capacitors coupled in parallel, each metal-insulator-metal capacitor of the plurality of metal-insulator-metal capacitors having a top plate, a bottom plate, and a corresponding capacitance, and a plurality of bottom contacts, at least one of the plurality of bottom contacts arranged between a pair of directly adjacent metal-insulator-metal capacitors of the plurality of metal-insulator-metal capacitors. Also disclosed are antennaplexers, electronic device modules, and electronic devices including aspects and embodiments of the semiconductor device.

METHOD OF FABRICATING A FLIP-CHIP ENHANCED QUAD FLAT NO-LEAD ELECTRONIC DEVICE WITH CONDUCTOR BACKED COPLANAR WAVEGUIDE TRANSMISSION LINE FEED IN MULTILEVEL PACKAGE SUBSTRATE
20260018542 · 2026-01-15 ·

A method of fabricating an electronic device including fabricating a multilevel package substrate with first, second, third, and fourth levels, a semiconductor die mounted to the first level, and fabricating a conductor backed coplanar waveguide transmission line feed with an interconnect and a conductor, the interconnect including coplanar first, second, and third conductive lines extending in the first level along a first direction from respective ends to an antenna, the second and third conductive lines spaced apart from opposite sides of the first conductive line along an orthogonal second direction, and the conductor extending in the third level under the interconnect and under the antenna.

HIGH FREQUENCY DEVICES INCLUDING ATTENUATING DIELECTRIC MATERIALS

A device includes a high frequency chip and a dielectric material arranged between a first area radiating an electromagnetic interference signal in a first frequency range between 1 GHz and 1 THz and a second area receiving the electromagnetic interference signal. An attenuation of the dielectric material is more than 5 dB/cm at least in a subrange of the first frequency range.

FLIP-CHIP BONDING-BASED ANTENNA PACKAGING STRUCTURE AND ITS MANUFACTURING METHOD

A flip-chip bonding-based antenna packaging structure and its manufacturing method are provided. The flip-chip bonding-based antenna packaging structure includes a lead frame structure and a redistribution structure disposed above the lead frame structure. The redistribution structure includes a first surface and a second surface. The lead frame structure is disposed on the redistribution structure and includes a metal member, a first active element, and a passive element. The metal member includes a base portion, a first supporting portion on the base portion, and an extension portion adjacent to the first supporting portion. The extension portion extends from the base portion, and the first supporting portion is parallel to the extension portion. The first active element is disposed between the first supporting portion and the first surface. The passive element is disposed on the second surface and is electrically connected to the first active element.

Output matching circuit and power amplifier module
12550745 · 2026-02-10 · ·

An output matching circuit includes a transformer having one end electrically connected to an output terminal of a power amplifier element that amplifies an input signal and another end electrically connected to a terminal connected to a load, and converting an impedance of the terminal connected to the load to an impedance higher than an impedance of the output terminal, a first filter circuit that attenuates a signal within a first frequency band higher than a transmission frequency band of the input signal, and a second filter circuit that attenuates a signal within a second frequency band higher than the first frequency band.

MICROELECTRONIC DEVICE PACKAGE WITH INTEGRAL ANTENNA MODULE AND SEMICONDUCTOR DEVICE

In a described example, an apparatus includes: a semiconductor device mounted to a device side surface of a package substrate, the package substrate having a board side surface opposite the device side surface; an antenna module mounted to the package substrate and coupled to the semiconductor device; and mold compound covering the semiconductor device and a portion of the package substrate.

RADIOFREQUENCY FILTER

A radiofrequency filter includes a substrate, an isolation structure, an electrically conductive structure, a spacer structure, a dielectric layer, a patterned electrically conductive film, a first contact structure, and a second contact structure. The isolation structure is disposed in the substrate. The electrically conductive structure is disposed on the isolation structure. The spacer structure is disposed on the substrate and located on a sidewall of the electrically conductive structure. The dielectric layer is disposed on the electrically conductive structure. The patterned electrically conductive film is disposed on the dielectric layer. At least a part of the dielectric layer is located between the electrically conductive structure and the patterned electrically conductive film in a vertical direction. The first contact structure and the second contact structure are disposed on and electrically connected with the patterned electrically conductive film.

RADIOFREQUENCY FILTER

A radiofrequency filter includes a substrate, an isolation structure, an electrically conductive structure, a spacer structure, a dielectric layer, a patterned electrically conductive film, a first contact structure, and a second contact structure. The isolation structure is disposed in the substrate. The electrically conductive structure is disposed on the isolation structure. The spacer structure is disposed on the substrate and located on a sidewall of the electrically conductive structure. The dielectric layer is disposed on the electrically conductive structure. The patterned electrically conductive film is disposed on the dielectric layer. At least a part of the dielectric layer is located between the electrically conductive structure and the patterned electrically conductive film in a vertical direction. The first contact structure and the second contact structure are disposed on and electrically connected with the patterned electrically conductive film.

ELECTRONIC DEVICE AND MULTILEVEL PACKAGE SUBSTRATE WITH INTEGRATED FILTER

A method of fabricating an electronic device includes forming a multilevel package substrate, a semiconductor die, and a package structure, the multilevel package substrate having a first level, a second level, and a filter circuit in the first and second levels. The filter circuit includes a filter input terminal, a first capacitor, a first inductor, a second capacitor, a second inductor, a filter output terminal, and a reference terminal. The semiconductor die is attached to the multilevel package substrate and has a conductive structure coupled to one of the terminals of the filter circuit, and the package structure encloses the semiconductor die and a portion of the multilevel package substrate.