A semiconductor device includes a first die pad, a first semiconductor element, a second die pad, a second semiconductor element, a sealing resin, a first lead, a second lead, a third lead, and a fourth lead. The first lead, the second lead, the third lead, and the fourth lead are each spaced apart from the third side and the fourth side of the sealing resin and are exposed externally from either the first side surface or the second side surface of the sealing resin. Viewed in a third direction perpendicular to the first direction and the second directions, an area of the first die pad is larger than an area of the second die pad. Viewed in the third direction, each of the first lead and the third lead is separated away in the first direction from a first virtual line toward a side where the first side surface of the sealing resin is located.

A discrete power semiconductor package includes a semiconductor chip, a heatsink, a first lead, a second lead, and a clip. The heatsink is adjacent the semiconductor chip and draws heat away from the semiconductor chip. The clip binds the semiconductor chip to the heatsink and includes a chip linker, a first terminal, and a second terminal. The chip linker is atop the semiconductor chip. The first terminal connects to the first lead and the second terminal connects to the second lead.

In a described example, an apparatus includes: a package substrate with conductive leads; a semiconductor die mounted to the package substrate, the semiconductor die having a first thickness; electrical connections coupling bond pads on the semiconductor die to conductive leads on the package substrate; brackets attached to the package substrate spaced from the semiconductor die and extending away from the package substrate to a distance from the package substrate that is greater than the first thickness of the semiconductor die; and mold compound covering the package substrate, the semiconductor die, the brackets, and the semiconductor die to form a semiconductor device package having a board side surface and a top surface opposite the board side surface, and having portions of the brackets exposed from the mold compound on the top surface of the semiconductor device package to form mounts for a passive component.

An electronic device includes: an insulating substrate including an obverse surface facing a thickness direction; a wiring portion formed on the substrate obverse surface and made of a conductive material; a lead frame arranged on the substrate obverse surface; a first and a second semiconductor elements electrically connected to the lead frame; and a first control unit electrically connected to the wiring portion to operate the first semiconductor element as a first upper arm and operate the second semiconductor element as a first lower arm. The lead frame includes a first pad portion to which the first semiconductor element is joined and a second pad portion to which the second semiconductor element is joined. The first and second pad portions are spaced apart from the wiring portion and arranged in a first direction with a first separation region sandwiched therebetween, where the first direction is orthogonal to the thickness direction. The first control unit is spaced apart from the lead frame as viewed in the thickness direction, while overlapping with the first separation region as viewed in a second direction orthogonal to the thickness direction and the first direction.

A power electronics module, having a DBC PCB having power semiconductors arranged thereon, and a multilayered leadframe including at least two separate subframes. No power or control routing takes place on the PCB. A region of the load source subregion is arranged between the PCB and the gate source and kelvin source subregion and is in electrical contact with the power semiconductors, and an adjoining region is located outside the PCB. A region of the drain source subregion is in electrical contact with a drain terminal on the PCB, and an adjoining region is located outside the PCB. The gate source subregion and the kelvin source subregion have a region above the load source subregion at which said subregions are in electrical contact with the power semiconductors and have an adjoining region outside the PCB which is opposite the drain source subregion and has pins bent above the PCB.

Provided is a semiconductor device in which breakage of a lead part caused by vibration hardly occurs. A semiconductor device includes: a semiconductor module including a plurality of lead parts; a circuit substrate connected to the plurality of lead parts of the semiconductor module; and a heatsink attached to the semiconductor module on a side opposite to a side of the circuit substrate. The plurality of lead parts include first lead parts as the lead parts disposed on both ends and second lead parts as lead parts disposed in positions other than both ends. The first lead part is thicker than the second lead part in a part between a root part as a part protruding from the semiconductor module and a connection part as a part connected to the circuit substrate.

A semiconductor module arrangement includes: a housing; a substrate arranged in or forming a bottom of the housing; a bus bar including a first end and a second end opposite the first end, the first end being arranged inside the housing and the second end extending to outside of the housing; and at least one connecting element mechanically and electrically coupled to a top surface of the substrate. The first end of the bus bar is arranged distant from the substrate in a vertical direction. The vertical direction is a direction perpendicular to the top surface of the substrate. The first end of the bus bar is electrically coupled to at least one of the at least one connecting element by one or more electrical connections.

A method of manufacturing a semiconductor device with an attached battery is provided. The method includes affixing a semiconductor die to a die pad region of a first battery lead of a leadframe. The first battery lead of the leadframe is separated from a second battery lead of the leadframe. An encapsulant encapsulates the semiconductor die and portions of the first and second battery leads of the leadframe. The battery is affixed to an exposed portion of the first battery lead of the leadframe such that a first terminal of the battery is conductively connected to the first battery lead. An exposed portion of the second battery lead of the leadframe is bent to overlap a top surface portion of the battery such that a second terminal of the battery conductively connected to the second battery lead.

A semiconductor device comprises a semiconductor chip and an electrically conductive chip carrier, wherein the semiconductor chip is mounted on the chip carrier. The semiconductor device furthermore comprises an electrically conductive extension element mechanically connected to the chip carrier, wherein the extension element and the chip carrier are formed as an integral single piece. A part of the chip carrier which has the extension element is configured as an antenna.

An electronic device that includes a substrate and a die disposed on the substrate, the die having an active surface. Wire bonds are attached from the active surface of the die to the substrate. A radiation barrier is attached to the substrate and disposed over the die. The radiation barrier is configured to mitigate electromagnetic radiation exposure to the die. A mold compound is formed over the die, the wire bonds, and the radiation barrier.