A power module is provided. The power module is disposed on a main board. The power component includes a first surface, a second surface, a source terminal, a gate terminal and a drain terminal. The source terminal and the gate terminal are disposed on the first surface. The drain terminal is disposed on the second surface. The first solder layer is attached to the first surface and connected with the source terminal and the gate terminal. The first solder layer is disposed on a metal surface of the main board. The second solder layer is attached to the second surface and connected with the drain terminal. The drain terminal is away from the main board than the source terminal and the gate terminal. The conductive component is connected with the first solder layer and the second solder layer.

In examples, a package comprises a semiconductor die having a device side and a bond pad on the device side, a conductive terminal exposed to an exterior of the package, and an electrical fuse. The electrical fuse comprises a conductive ball coupled to the bond pad, and a bond wire coupled to the conductive terminal. The bond wire is stitch-bonded to the conductive ball.

A microelectronic device package includes: a package substrate having a first set of leads spaced from a first die pad configured for mounting semiconductor devices, and a second set of leads spaced from a second die pad configured for mounting additional semiconductor devices, the first die pad and the first set of leads spaced from the second die pad and the second set of leads. Semiconductor devices are mounted to the first die pad and second die pad. A ceramic interposer is mounted to the package substrate in thermal contact with at least the first die pad. Mold compound covers the semiconductor devices, a portion of the ceramic interposer, and portions of the first set and the second set of leads.

A method of forming a semiconductor device includes forming a base leadframe having a plurality of leads and a die pad. A cavity is formed in each lead of a set of leads of the plurality of leads. Bond pads of a first semiconductor die are interconnected with respective leads of the plurality of leads. A metal core connector is placed on each cavity of the set of leads. A packaged device is mounted on the base leadframe by way of the metal core connectors. The packaged device includes a second semiconductor die mounted on package leads of a package leadframe. A first encapsulant encapsulates the second semiconductor die and package leadframe. A portion of each of the package leads is exposed through the first encapsulant. A second encapsulant encapsulates the first semiconductor die, a portion of the base leadframe, and a portion of the packaged device.

A molded semiconductor package includes a lead frame having one or more first leads monolithically formed with a die pad and extending outward from the pad in a first direction. A semiconductor die is attached to the die pad at a first side of the die. A metal clip of a clip frame is attached to a power terminal at a second side of the die. One or more second leads monolithically formed with the metal clip extend outward from the clip in a second direction different than the first direction. A mold compound embeds the die. The first lead(s) and the second lead(s) are exposed at different sides of the mold compound and do not vertically overlap with one another. Within the mold compound, the clip transitions from a first level above the power terminal to a second level in a same plane as the leads.

A variety of footed and leadless semiconductor packages, with either exposed or isolated die pads, are described. Some of the packages have leads with highly coplanar feet that protrude from a plastic body, facilitating mounting the packages on printed circuit boards using wave-soldering techniques.

A transistor package includes a transistor chip having opposing first and second main sides, and a first load electrode and a second load electrode on the first main side, with a carrier facing the second main side. A first terminal post is arranged laterally beside the transistor chip. A second terminal post is arranged laterally beside the transistor chip on an opposite side. A first clip connects the first load electrode to the first terminal post. A second clip connects the second load electrode to the second terminal post. At least one of the clips includes a first contact element which projects from a first side wall of the clip and is bent downwards in a direction towards the transistor chip to electrically contact the first or second load electrode of the chip, a bending axis being in a longitudinal direction of the clip.

In a described example, an apparatus includes: a package substrate with conductive leads; a semiconductor die mounted to the package substrate, the semiconductor die having a first thickness; electrical connections coupling bond pads on the semiconductor die to conductive leads on the package substrate; brackets attached to the package substrate spaced from the semiconductor die and extending away from the package substrate to a distance from the package substrate that is greater than the first thickness of the semiconductor die; and mold compound covering the package substrate, the semiconductor die, the brackets, and the semiconductor die to form a semiconductor device package having a board side surface and a top surface opposite the board side surface, and having portions of the brackets exposed from the mold compound on the top surface of the semiconductor device package to form mounts for a passive component.

A semiconductor device includes a chip carrier, a first power chip arranged above a mounting surface of the chip carrier, a laminate arranged above a top surface of the first power chip facing away from the chip carrier, and a first logic chip configured to drive the first power chip and arranged above a top surface of the laminate facing away from the chip carrier. The first power chip and the first logic chip are electrically coupled via an electrical wiring of the laminate.

A lead frame includes a base island; a plurality of leads located around the base island, the adjacent leads having between them a gap, each of the leads comprising an inner lead close to the base island and an outer lead far away from the base island, the inner lead and the outer lead being connected by a connection part; a UV tape covering at least one of a back surface or a front surface of the connection part of each of the leads and filling the gaps between the connection parts of the adjacent leads, the UV tape being configured to prevent molding layer material from overflowing in the direction of the outer leads through the gaps between the adjacent leads during subsequent formation of a molding layer covering the base island and the inner leads, and the UV tape being peeled off after irradiation by a UV light after forming the molding layer.