Various embodiments include methods and apparatuses to moisturize a substrate prior to an electrochemical deposition process. In one embodiment, a method to control substrate wettability includes placing a substrate in a pre-treatment chamber, controlling an environment of the pre-treatment chamber to moisturize a surface of the substrate; and placing the substrate into a plating cell. Other methods and systems are disclosed.

The present invention relates to a semiconductor device with improved reliability and a method for manufacturing the same. A semiconductor device according to the present invention may comprise: a substrate including a gate trench; a gate insulating layer formed on a surface of the gate trench; and silicon-doped metal nitride on the gate insulating layer, wherein the silicon-doped metal nitride has a silicon concentration of less than 1 at %.

A method includes forming a first conductive feature in a first dielectric layer, forming a first metal cap over and contacting the first conductive feature, forming an etch stop layer over the first dielectric layer and the first metal cap, forming a second dielectric layer over the etch stop layer; and etching the second dielectric layer and the etch stop layer to form an opening. The first conductive feature is exposed to the opening. The method further includes selectively depositing a second metal cap at a bottom of the opening, forming an inhibitor film at the bottom of the opening and on the second metal cap, selectively depositing a conductive barrier in the opening, removing the inhibitor film, and filling remaining portions of the opening with a conductive material to form a second conductive feature.

Provided herein are methods of depositing molybdenum (Mo) films. The methods involve depositing a thin layer of a molybdenum (Mo)-containing film such a molybdenum oxide, a molybdenum nitride, or a molybdenum oxynitride. The Mo-containing film is then converted to an elemental Mo film. A bulk Mo film may then be deposited on the elemental Mo film. In some embodiments, the process is performed at relatively low temperatures.

A device includes a source region and a drain region over a substrate. The device further includes a gate structure at least partially between the source region and the drain region, and a gate contact over the gate structure. The gate contact has an upper portion and a lower portion below the upper portion. The lower portion is more tapered than the upper portion.

A method of microfabrication includes providing a substrate having an existing pattern, wherein the existing pattern comprises features formed within a base layer such that a top surface of the substrate has features uncovered and the base layer is uncovered, depositing a selective attachment agent on the substrate, wherein the selective attachment agent includes a solubility-shifting agent, depositing a first resist on the substrate, activating the solubility shifting agent such that a portion of the first resist becomes insoluble to a first developer, developing the first resist using the first developer such that a relief pattern comprising openings is formed, wherein the openings expose the features of the existing layer, and executing a selective growth process that grows a selective-deposition material on the features and within the openings of the relief pattern to provide self-aligned selective deposition features.

Disclosed are methods and systems for depositing layers comprising a metal and nitrogen. The layers are formed onto a surface of a substrate. The deposition process may be a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.

Disclosed are methods and systems for depositing layers comprising a metal and nitrogen. The layers are formed onto a surface of a substrate. The deposition process may be a cyclical deposition process. Exemplary structures in which the layers may be incorporated include field effect transistors, VNAND cells, metal-insulator-metal (MIM) structures, and DRAM capacitors.

A method of forming an electrode in accordance with an exemplary embodiment includes a process of forming a mask pattern on one surface of a base to expose a partial area of the one surface of the base by using a mask material that is polymer including an end tail having at least one bonding structure of covalent bond and double bond, a process of loading the base on which the mask pattern is formed into a chamber, and a process of forming a conductive layer containing copper on the exposed one surface of the base by using an atomic layer deposition method that alternately injects a source material containing copper and a reactive material that reacts with the source material into the chamber. Thus, according to the method of forming an electrode in accordance with an exemplary embodiment, a thin-film caused by a material for forming an electrode is not formed on a surface of the mask pattern. Therefore, a residue is not remained when the mask pattern is removed to prevent a defect caused by the residue from being generated.

A thin film deposition method and a method of fabricating an electronic device using the same are disclosed. The thin film deposition method may include preparing a substrate structure having a pattern portion including a hole, adsorbing a reaction inhibitor to inside and outside of the hole in the substrate structure, wherein an adsorption density of the reaction inhibitor may be lower in the inside than the outside, and depositing a metal layer on the inside and outside the hole by an atomic layer deposition (ALD) process, wherein a deposition rate of the depositing may vary depending on regions by the reaction inhibitor, and wherein the reaction inhibitor may include a metal atom and a ligand for reaction inhibition bonded to the metal atom, and the metal atom may remain on the substrate structure in the depositing the metal layer.