The present disclosure generally relates to semiconductor processing including facet suppression for an epitaxial growth process. In an example, a semiconductor device includes a first semiconductor material, a dielectric layer, and a second semiconductor material. The first semiconductor material includes a monocrystalline surface. The dielectric layer is over the first semiconductor material and has an opening to the first semiconductor material. The opening is defined at least in part by a sidewall of the dielectric layer. The sidewall includes a retrograde sidewall portion. The retrograde sidewall portion is planar and retrograde laterally into the dielectric layer from a distance distal from an interface between the dielectric layer and the monocrystalline surface of the first semiconductor material to a surface of the dielectric layer at the interface. The second semiconductor material is over the first semiconductor material. The second semiconductor material is at least partially in the opening.

A method of forming a support substrate having a charge-trapping layer involves introducing a single-crystal silicon base substrate into a deposition chamber and, without removing the base substrate from the chamber and while flushing the chamber with a precursor gas, forming an intrinsic silicon epitaxial layer on the base substrate, then forming a dielectric layer on the base substrate by introducing a reactive gas into the chamber over a first time period, and then forming a polycrystalline silicon charge-trapping layer on the dielectric layer by introducing a precursor gas into the chamber over a second time period. The time for which the dielectric layer is exposed only to the carrier gas, between the first time period and the second time period, is less than 30 seconds and the formation of the charge-trapping layer is performed at a temperature of between 1010 C. and 1200 C.

A semiconductor device includes a plurality of seed structures disposed in a dielectric layer. The plurality of seed structures are spaced apart from each other. Respective ones of the plurality of seed structures have a tapered shape with a decreasing width from an upper surface of the dielectric layer, and include semiconductor crystalline material.

A method for manufacturing a silicon substrate for a quantum computer, the method includes the steps of forming a Si epitaxial layer by epitaxial growth using a Si source gas as a silicon-based raw material gas, in which a total content of 28Si and 30Si in a whole silicon contained in the silicon-based raw material gas is 99.9% or more, on a silicon substrate, forming an oxygen (O) -doped layer by oxidizing a surface of the Si epitaxial layer, and forming a Si epitaxial layer by epitaxial growth using a Si source gas, in which a total content of 28Si and 30Si in a whole silicon contained in the silicon-based raw material gas is 99.9% or more, on the -doped layer.

A layered structure includes a substrate, a porous layer over the substrate, and a coating coupled to porous walls of the porous layer. The porous layer has a higher resistivity than the substrate. Advantageously the coating can improve thermal stability of the porous layer, reduce cracking and flaking during high temperature processing, maintain high resistivity of the porous layer, increase thermal conductivity of the porous layer, and reduce self-heating in a device.