A power semiconductor device according to the present invention is provided with: a first circuit body constituting an upper arm of an inverter circuit for converting a DC current into an AC current; a second circuit body constituting a lower arm of the inverter circuit; and a circuit board that has therein a through-hole in which the first circuit body and the second circuit body are disposed and that has an intermediate board between the first circuit body and the second circuit body. The intermediate board has an AC wiring pattern for transmitting the AC current, and the first circuit body and the second circuit body are connected to the AC wiring pattern so as to be in surface contact with the AC wiring pattern.

A semiconductor apparatus includes a substrate, a semiconductor device arranged on an upper surface of the substrate, a lead frame bonded to an upper surface of the semiconductor device via a bonding material, the lead frame having a first recess on an upper surface thereof, a wire connected to the first recess, and a resin that seals the substrate, the semiconductor device, the lead frame, and the wire.

An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.

An electronic device includes a substrate having first and second conductive traces, a semiconductor die having a transistor with a first terminal and a second terminal, and first and second metal clips. The first metal clip has a first end portion coupled to the first terminal of the transistor, and a second end portion coupled to the first conductive trace of the substrate. The second metal clip has a first end portion coupled to the second terminal of the transistor and a second end portion coupled to the second conductive trace of the substrate, and a middle portion of the second metal clip is spaced apart from and at least partially overlying a portion of the first metal clip.

The purpose of this invention is to provide a semiconductor device that prevents defects in semiconductor elements caused by differences in thermal expansion and maintains low electrical resistance by directly or indirectly laminating an FeNi alloy metal layer onto the front-surface or back-surface electrodes of the semiconductor element. In this invention, an FeNi alloy metal layer is directly or indirectly applied on the surface electrodes of the semiconductor element, and the semiconductor element is connected to a conductor through the FeNi alloy metal layer. Depending on the application, the Ni content of the FeNi alloy metal layer is set within the range of 36% to 45% by weight, and the thickness of the FeNi alloy metal layer is set within the range of 2 m to 20 m.

A semiconductor device includes a heat sink, a base material including an insulating layer and mounted on the heat sink on one side in a first direction, a first conductive layer bonded to the base material and located on a side opposite the heat sink with respect to the base material, a first semiconductor element bonded to the first conductive layer, a first power terminal electrically connected to the first conductive layer and the first semiconductor element, and a sealing resin covering the first conductive layer and the first semiconductor element. The first power terminal is exposed from the sealing resin. The first power terminal is surrounded by a peripheral edge of the sealing resin as viewed in the first direction.

A power module includes a first end power semiconductor element and a second end power semiconductor element. A first sum is a sum of a path length between the gate electrode of the first end power semiconductor element and a first control terminal and a path length between the source electrode of the first end power semiconductor element and a first detection terminal. A second sum is a sum of a path length between the gate electrode of the second end power semiconductor element and the first control terminal and a path length between the source electrode of the second end power semiconductor element and the first detection terminal. The power module includes a first control layer connected to the gate electrode. The first control layer includes a first detour portion that detours the path to reduce a difference between the first sum and the second sum.

A semiconductor module includes a laminate substrate including an insulating plate and first and second circuit boards on an upper surface of the insulating plate, the first semiconductor device on an upper surface of the first circuit board, a first main terminal, and a first metal wiring board that electrically connects the first semiconductor device to the first main terminal. The first metal wiring board has a first bonding section bonded to an upper surface electrode of the first semiconductor device, a second bonding section bonded to an upper surface of the second circuit board, a first coupling section that couples the first bonding section to the second bonding section, a first raised section that rises upward from an end portion of the second bonding section. The first raised section has an upper end that is electrically connected to the first main terminal.

A semiconductor device includes: a plurality of semiconductor elements connected in parallel; a rectifier element connected in anti-parallel to the plurality of semiconductor elements; a power terminal electrically connected to the plurality of semiconductor elements; and an electrical conductor electrically connected to the power terminal and the plurality of semiconductor elements and including a pad portion to which the plurality of semiconductor elements are bonded. The plurality of first semiconductor elements include a first element and a second element. The minimum conduction path of the first element to the power terminal is shorter than the minimum conduction path of the second element to the power terminal. The pad portion includes a first section to which the first element is bonded and a second section to which the second element is bonded. The rectifier element is located in the first section of the pad portion.

A semiconductor device includes a support member, a semiconductor element and a sealing member. The semiconductor element is disposed on a first side in a thickness direction relative to the support member. The sealing member covers a part of the support member and the semiconductor element. The support member has a first surface facing a second side in the thickness direction and exposed from the sealing member. The first surface is formed with a first uneven region. In an example, the first uneven region has an arithmetic mean roughness between 0.2 m and 13 m. In an example, the first uneven region includes a plurality of uneven lines in an arc shape.