Novel cyclic silicon precursors and oxidants are described. Methods for depositing silicon-containing films on a substrate are described. The substrate is exposed to a silicon precursor and a reactant to form the silicon-containing film (e.g., elemental silicon, silicon oxide, silicon nitride). The exposures can be sequential or simultaneous.

An etching and deposition system including a process chamber containing a platen for supporting a substrate, an reactive-ion etching (RIE) source adapted to produce an ion beam and to direct the ion beam into the process chamber for etching the substrate, a first plasma enhanced chemical vapor deposition (PECVD) source located on a first side of the RIE source, the first PECVD source adapted to produce a first radical beam and to direct the first radical beam into the process chamber for depositing a first material, and a second PECVD source located on a second side of the RIE source opposite the first side, the second PECVD source adapted to produce a second radical beam and to direct the second radical beam into the process chamber for depositing a second material.

A SiN film embedding method includes: an operation of adsorbing an aminosilane-based precursor inside a recess formed on a surface of a substrate; an operation of forming a SiN film inside the recess by plasmarizing and supplying a nitrogen gas into the recess to nitride the aminosilane-based precursor; and an operation of forming an adsorption-inhibiting region for the aminosilane-based precursor on an upper portion inside the recess by plasmarizing and supplying a non-halogen gas substantially more to the upper portion than a lower portion inside the recess.

A semiconductor device with a small variation in characteristics is provided. The semiconductor device includes an oxide, a first conductor and a second conductor over the oxide, a first insulator over the first conductor, a second insulator over the second conductor, a third conductor over the first insulator, a fourth insulator over the second insulator, a fifth insulator over the third insulator and the fourth insulator, a sixth insulator over the fifth insulator, a seventh insulator that is over the oxide and placed between the first conductor and the second conductor, an eighth insulator over the seventh insulator, a third conductor over the eighth insulator, and a ninth insulator over the third conductor and the sixth to eighth insulators. The third conductor includes a region overlapping the oxide. The seventh insulator includes a region in contact with each of the oxide, the first conductor, the second conductor, and the first to sixth insulators. The first insulator, the second insulator, the fifth insulator, and the ninth insulator are each a metal oxide having an amorphous structure.

A process includes acquiring temperature data indicating a temperature of a substrate placed on the substrate stage and temperature data indicating a temperature of the coolant, calculating, based on the acquired temperature data indicating the temperature of the substrate and the acquired temperature data indicating the temperature of the coolant, a thermal resistance of a heat conduction site on a heat transfer path from the substrate to the coolant, and calculating a heat flux to the substrate for each of a plurality of steps of a process recipe defining a substrate processing to be performed on the substrate. The process also includes calculating, based on the calculated thermal resistance and the calculated heat flux, an offset value to be added to a set temperature of the coolant for each of the steps.

A film forming method includes: a preparation process of preparing a substrate having a surface from which a first film without containing silicon and a second film are exposed; a first film formation process of forming a self-assembled monolayer, which has a fluorine-containing functional group and inhibits formation of a third film containing silicon, on the first film; a second film formation process of forming the third film on the second film; a modification process of decomposing the self-assembled monolayer by plasma using a gas containing hydrogen and nitrogen while maintaining a temperature of the substrate to be 70 degrees C. or lower, so that a side portion of the third film, which is formed in a vicinity of the self-assembled monolayer, is modified into ammonium fluorosilicate by active species contained in the decomposed self-assembled monolayer; and a removal process of removing the ammonium fluorosilicate.

A shower plate includes a base, a resistance heating element, a channel, and a hollow portion. The base is made of ceramic and has a plate shape. The resistance heating element is located inside the base along a first surface of the base. The channel is located inside the base and includes an intermediate channel that is located between the resistance heating element and a second surface on a side opposite to the first surface of the base and extends in a planar direction of the base. The hollow portion is located adjacent to the intermediate channel in the planar direction of the base inside the base.

A circuit structure and a method of manufacturing a circuit structure are provided. The circuit structure includes a first metal line and a second metal line. The second metal line is disposed over the first metal line. At least one air gap is disposed between the first metal line and the second metal line.

An antiferroelectric field effect transistor (Anti-FeFET) of a memory cell includes an antiferroelectric layer instead of a ferroelectric layer. The antiferroelectric layer may operate based on a programmed state and an erased state in which the antiferroelectric layer is in a fully polarized alignment and a non-polarized alignment (or a random state of polarization), respectively. This enables the antiferroelectric layer in the FeFET to provide a sharper/larger voltage drop for an erase operation of the FeFET (e.g., in which the FeFET switches or transitions from the programmed state to the erased state) relative to a ferroelectric material layer that operates based on switching between two opposing fully polarized states.

A method of processing a substrate that includes: forming a bottom passivation layer including an oxide over a first portion of a dielectric layer at a bottom of a recess of the substrate, the recess having sidewalls including a second portion of the dielectric layer; and performing a lateral etch to etch the second portion of the dielectric layer, the bottom passivation layer covering the first portion of the dielectric layer during the lateral etch, and where the forming of the bottom passivation layer includes exposing the substrate to a first plasma including a halogen, and exposing the substrate to a second plasma including oxygen to form the bottom passivation layer.