A method for depositing an oxide film on a substrate by a cyclical deposition is disclosed. The method may include: depositing a metal oxide film over the substrate utilizing at least one deposition cycle of a first sub-cycle of the cyclical deposition process; and depositing a silicon oxide film directly on the metal oxide film utilizing at least one deposition cycle of a second sub-cycle of the cyclical deposition process. Semiconductor device structures including an oxide film deposited by the methods of the disclosure are also disclosed.

A manufacture includes a polysilicon structure over a portion of a substrate. The manufacture further includes a spacer on a sidewall of the polysilicon structure, wherein the spacer has a concave corner region between an upper portion and a lower portion, the spacer has an outer sidewall and an inner sidewall, and the inner sidewall is between the outer sidewall and the polysilicon structure. The manufacture further includes a protective layer exposing a portion of the outer sidewall of the spacer above the concave corner region, wherein the protective layer covers an entirety of the lower portion of the spacer, and the protective layer directly contacts the substrate.

Techniques are provided herein to form semiconductor devices that include one or more gate cuts having a very high aspect ratio (e.g., an aspect ratio of 5:1 or greater, such as 10:1). In an example, a semiconductor device includes a conductive material that is part of a transistor gate structure around or otherwise on a semiconductor region. The semiconductor region can be, for example, a fin of semiconductor material that extends between a source region and a drain region, or one or more nanowires or nanoribbons of semiconductor material that extend between a source region and a drain region. The gate structure may be interrupted between two transistors with a gate cut that extends through an entire thickness of the gate structure. A particular plasma etching process may be performed to form the gate cut with a very high height-to-width aspect ratio so as to enable densely integrated devices.

Methods, apparatus, and systems are provided herein for processing a substrate. Generally, the processing involves Spacer-on-Spacer (SoS) Self-Aligned Quadruple Patterning (SAQP) techniques. The disclosed techniques provide a novel process flow that reduces defects by ensuring that cores are not removed from the substrate until the substrate is transferred to a deposition chamber used to deposit a second spacer layer. This reduces or eliminates the risk of structural damage to features on the substrate while the substrate is being transferred or cleaned. Such structural damage is common when the cores are removed from the substrate prior to cleaning and transfer.

Selective gas etching for self-aligned pattern transfer uses a first block and a separate second block formed in a sacrificial layer to transfer critical dimensions to a desired final layer using a selective gas etching process. The first block is a first hardmask material that can be plasma etched using a first gas, and the second block is a second hardmask material that can be plasma etched using a second gas separate from the first gas. The first hardmask material is not plasma etched using the second gas, and the second hardmask material is not plasma etched using the first gas.

Selective gas etching for self-aligned pattern transfer uses a first block and a separate second block formed in a sacrificial layer to transfer critical dimensions to a desired final layer using a selective gas etching process. The first block is a first hardmask material that can be plasma etched using a first gas, and the second block is a second hardmask material that can be plasma etched using a second gas separate from the first gas. The first hardmask material is not plasma etched using the second gas, and the second hardmask material is not plasma etched using the first gas.

A wafer support device according to an embodiment provides a wafer support device. The wafer support device has a support table and a wafer guide portion. The wafer guide portion includes a first chamfered portion and a second chamfered portion. The support table has a support surface that supports the wafer. The wafer guide portion has an annular shape that surrounds the circumference of the wafer supported on the support surface with the central axis extending in a normal direction of the support surface as a center. The first chamfered portion connects an inner circumferential surface and an upper surface of the wafer guide portion, and extends upward from the inner circumferential surface toward the outer circumferential side. The second chamfered portion connects an outer circumferential surface and the upper surface of the wafer guide portion, and extends upward from the outer circumferential surface toward the inner circumferential side.

A composition for forming a silicon-containing film, the composition containing a silicon precursor compound represented by chemical formula 1, can be used to efficiently form a silicon-containing film, including a silicon-containing oxide film or a silicon-containing composite metal oxide film, at a high temperature of at least 600 C., wherein the silicon-containing film can be controlled to have a desired thickness and composition, and can be formed to have excellent coverage and uniformity even on a substrate having a complex shape.

Provided is a method of forming a thin film to minimize an increase in defects at an interface during a high-temperature oxidation process of a SiC substrate. The method includes depositing a first thin film on the SiC substrate by applying a radical gas, forming an oxide film on the first thin film by performing the high-temperature oxidation process, and performing annealing on the oxide film.

Embodiments include semiconductor processing methods to form dielectric films on semiconductor substrates are described. The methods may include providing a silicon-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The methods may include providing an inert precursor to the processing region of the semiconductor processing chamber. The methods may include generating plasma effluents of the silicon-containing precursor, the nitrogen-containing precursor, and the inert precursor. The methods may include depositing a silicon-containing material on the substrate.