A system for processing a semiconductor wafer is provided. The system includes a processing tool. The system also includes gas handling housing having a gas inlet and a gas outlet. The system further includes an exhaust conduit fluidly communicating with the processing tool and the gas inlet of the gas handling housing. In addition, the system includes at least one first filtering assembly and at least one second filtering assembly. The first filtering assembly and the second filtering assembly are positioned in the gas handling housing and arranged in a series along a flowing path that extends from the gas inlet to the gas outlet of the gas handling housing. Each of the first filtering assembly and the second filtering assembly comprises a plurality of wire meshes stacked on top of another.

A system for processing a semiconductor wafer is provided. The system includes a processing tool. The system also includes gas handling housing having a gas inlet and a gas outlet. The system further includes an exhaust conduit fluidly communicating with the processing tool and the gas inlet of the gas handling housing. In addition, the system includes at least one first filtering assembly and at least one second filtering assembly. The first filtering assembly and the second filtering assembly are positioned in the gas handling housing and arranged in a series along a flowing path that extends from the gas inlet to the gas outlet of the gas handling housing. Each of the first filtering assembly and the second filtering assembly comprises a plurality of wire meshes stacked on top of another.

A carrier structure and methods of forming and using the same are described. In some embodiments, the method includes forming one or more devices over a substrate, forming a first interconnect structure over the one or more devices, and bonding the first interconnect structure to a carrier structure. The carrier structure includes a semiconductor substrate, a release layer, and a first dielectric layer, and the release layer includes a metal nitride. The method further includes flipping over the one or more devices so the carrier structure is located at a bottom, performing backside processes, flipping over the one or more devices so the carrier structure is located at a top, and exposing the carrier structure to IR lights. Portions of the release layer are separated from the first dielectric layer.