H10P14/265

METHOD FOR FORMING FILM, FILM-FORMING APPARATUS, SUSCEPTOR, AND a-GALLIUM OXIDE FILM
20260055504 · 2026-02-26 · ·

A method for forming a film, including: atomizing a raw material solution into a mist to form raw material mist; mixing raw material mist and a carrier gas to form gas mixture; placing a substrate on a placement section of susceptor; supplying gas mixture from an atomizer to the substrate to perform film formation by thermal reaction on substrate; and discharging gas mixture after the film formation through an exhaust unit, wherein in the step of supplying the gas mixture from atomizer to substrate to perform film formation by thermal reaction on the substrate, at least a part of gas mixture is supplied from a smooth section adjacent to placement section to a surface of substrate, the smooth section having a surface roughness of 200 m or less. A method for forming a film capable of uniformly and stably producing a high-quality film on a surface of a large-diameter substrate.

Multilayer structure

A multilayer structure of the present invention is a multilayer structure including a base substrate and a semiconductor film that is made of -Ga.sub.2O.sub.3 or an -Ga.sub.2O.sub.3-based solid solution and has a corundum crystal structure, the semiconductor film being disposed on the base substrate. The semiconductor film has an average film thickness of greater than or equal to 10 m. The semiconductor film is convexly or concavely warped. An amount of warpage of the semiconductor film is 20 m or greater and 64 m or less.

IGZO thin-film transistor and method for manufacturing same

An IGZO thin-film transistor and a method for manufacturing same. The method includes: acquiring a substrate; forming an IGZO layer on the substrate by a solution process; doping V impurities on a surface of the IGZO layer by a spin doping process; forming a source electrode at one side of the IGZO layer, and forming a drain electrode at the other side; forming a gate dielectric layer on the doped IGZO layer; and forming a gate electrode on the gate dielectric layer.