A method includes forming first sacrificial layers and first channel layers alternately stacked over a substrate; forming second channel layers and second sacrificial layers alternately stacked over the first sacrificial layers and the first channel layers, in which the second channel layers are made of a first semiconductive oxide; performing an etching process to remove portions of the first sacrificial layers and the second sacrificial layers; forming a gate structure in contact with the first channel layers and the second channel layers; forming first source/drain contacts on opposite sides of the gate structure and electrically connected to the first channel layers; and forming second source/drain contacts on the opposite sides of the gate structure and electrically connected to the second channel layers.

A semiconductor device manufacturing method includes: forming an organic film composed of a polymer having a urea bond in a recess by supplying amine and isocyanate to a surface of a substrate having the recess; performing a predetermined process on the substrate on which the organic film is formed in the recess; and removing the organic film in the recess by heating the substrate that has been subjected to the predetermined process to depolymerize the organic film. The amine and the isocyanate have a terminal bifunctional linear chain structure having two functional groups at both ends of a linear chain. At least one of the amine or the isocyanate has side chains connected to the linear chain contained in the linear chain structure.

The glass for covering a semiconductor element contains: in mol %, as a glass composition, SiO.sub.2: 20% to 36%, ZnO: 8% to 40%, B.sub.2O.sub.3: 10% to 24%, Al.sub.2O.sub.3: 10% to 20%, and MgO+CaO: 8% to 22%, in which SiO.sub.2/ZnO is 0.6 or more and less than 3.3 in terms of a molar ratio, and a lead component is substantially not contained.

A microelectronic device comprises a stack structure, a contact structure, a liner material, and a boron-containing material. The stack structure comprises alternating conductive structures and dielectric structures. The contact structure extends through the stack structure. The liner material is between the stack structure and the contact structure. The boron-containing material is between the liner material and the stack structure. Related electronic systems and methods are also described.

An etching and deposition system including a process chamber containing a platen for supporting a substrate, an reactive-ion etching (RIE) source adapted to produce an ion beam and to direct the ion beam into the process chamber for etching the substrate, a first plasma enhanced chemical vapor deposition (PECVD) source located on a first side of the RIE source, the first PECVD source adapted to produce a first radical beam and to direct the first radical beam into the process chamber for depositing a first material, and a second PECVD source located on a second side of the RIE source opposite the first side, the second PECVD source adapted to produce a second radical beam and to direct the second radical beam into the process chamber for depositing a second material.

A method includes depositing a dielectric layer over a semiconductor substrate; forming a first photoresist layer over the dielectric layer; patterning the first photoresist layer to form through holes, such that a first portion of the first photoresist layer between a first one and a second one of the through holes has a less height than a second portion of the first photoresist layer between the first one and a third one of the through holes; forming a spacer on the first portion of the first photoresist layer; performing an etching process on the dielectric layer to form via holes while the spacer remains covering the first portion of the first photoresist layer; forming a plurality of metal vias in the via holes.

A method includes depositing a dielectric layer over a semiconductor substrate; forming a first photoresist layer over the dielectric layer; patterning the first photoresist layer to form through holes, such that a first portion of the first photoresist layer between a first one and a second one of the through holes has a less height than a second portion of the first photoresist layer between the first one and a third one of the through holes; forming a spacer on the first portion of the first photoresist layer; performing an etching process on the dielectric layer to form via holes while the spacer remains covering the first portion of the first photoresist layer; forming a plurality of metal vias in the via holes.

Embodiments of the disclosure relate to methods of selectively depositing polysilicon after forming a flowable polymer film to protect a substrate surface within a feature. A first silicon (Si) layer is deposited by physical vapor deposition (PVD). The flowable polymer film is formed on the first silicon (Si) layer on the bottom. A portion of the first silicon (Si) layer is selectively removed from the top surface and the at least one sidewall. The flowable polymer film is removed. In some embodiments, a second silicon (Si) layer is selectively deposited on the first silicon (Si) layer to fill the feature. In some embodiments, the remaining portion of the first silicon (Si) layer on the bottom is oxidized to form a first silicon oxide (SiOx) layer on the bottom, and a silicon (Si) layer or a second silicon oxide (SiOx) layer is deposited on the first silicon oxide (SiOx) layer.

The invention provides a method for manufacturing a semiconductor structure, which comprises the following steps: providing a substrate with a shallow trench isolation structure and a first active area, wherein a top surface of the shallow trench isolation structure is higher than a top surface of the substrate in the first active area, performing an etching step to remove part of the shallow trench isolation structure so that the top surface of the shallow trench isolation structure is lower than that of the substrate in the first active area, and after the etching step, a doping step is performed on the first active area.