Patent classifications
H10P14/2924
Group III element nitride substrate and production method for group III element nitride substrate
A Group-III element nitride substrate includes a first main surface and a second main surface facing each other, wherein, in the first main surface, crystallinity of a first part positioned on a central portion thereof is higher than crystallinity of a second part positioned outside the first part.
METHOD FOR THINNING A COMPOSITE STRUCTURE CARRIED BY A POLYCRYSTALLINE SIC CARRIER SUBSTRATE, WITH REDUCED WARPAGE
A method of processing a composite structure including a thin layer of single-crystal silicon carbide disposed on a polycrystalline silicon carbide carrier substrate, includes, after formation of electronic component elements on a front face of the composite structure, grinding a rear face of the composite structure and removing a work-hardened layer present on the surface of the rear face as a result of the grinding process.
Method for preparing silicon-on-insulator
In a method for preparing silicon-on-insulator, the first etching stop layer, the second etching stop layer, and the device layer are formed bottom-up on the p-type monocrystalline silicon epitaxial substrate, where the first etching stop layer is made of intrinsic silicon, the second etching stop layer is made of germanium-silicon alloy, and the device layer is made of silicon. After oxidation, bonding, reinforcement, and grinding treatment, selective etching is performed. Through a first selective etching to p+/intrinsic silicon, the thickness deviation of the first etching stop layer on the second etching layer is controlled within 100 nm, and then through the second etching and the third etching, the thickness deviation and the surface roughness of the finally prepared silicon-on-insulator film can be optimized to less than 5 nm and less than 4 , respectively, so as to realize the flatness of the silicon-on-insulator film.