In an embodiment a device includes a substrate including an upper substrate surface and a lower substrate surface and a membrane-layer suspended above the upper substrate surface, wherein the substrate includes a recess penetrating the substrate between the lower substrate surface and the upper substrate surface, wherein the membrane-layer spans the recess, wherein the recess includes an upper recess region, an intermediate recess region, and a lower recess region, wherein the upper recess region is a part of the recess in direct vicinity to the upper substrate surface, the intermediate recess region is a part of the recess directly below the upper recess region, and the lower recess region is a part of the recess other than the upper recess region and the intermediate recess region, and wherein a cross-sectional area of the upper recess region determined parallel to the upper substrate surface is larger than a respective cross-sectional area of the intermediate recess region.

A method of manufacturing a semiconductor device includes providing a semiconductor layer having a first-type region and a second-type region that are stacked and interface with each other to form a p-n junction, the first-type region defining a first side of the semiconductor layer and the second-type region defining a second side of the semiconductor layer. The method further includes providing an insulating layer on the second side of the semiconductor layer and etching the semiconductor layer from the first side of the semiconductor layer toward the second side of the semiconductor layer to form a trench. The first-type region corresponds to one of a n-type region and a p-type region, and the second-type region corresponds to the other of the n-type region and the p-type region.

Provided is an atomic-smooth device with a microstructure. The device includes, from the bottom to top, a substrate, a bonding material, a second dielectric layer on the substrate, the microstructure, and a first dielectric layer, where a surface of the first dielectric layer is an atomic-smooth surface. Further provided is a method for preparing an atomic-smooth device with a microstructure to effectively avoid pits or burrs generated when the existing microstructure is machined.

A silicon substrate having a first silicon substrate having a first surface with a cavity and a second surface opposite the first surface; a first silicon oxide film having a thickness d1 on the first surface; a second silicon oxide film having a thickness d2 on a bottom of the cavity; and a third silicon oxide film having a thickness d3 on the second surface, where d1≤d3 and d1<d2, or d3<d1 and d2<d1.

A semiconductor substrate includes a first semiconductor layer, a first dielectric layer coupled to the first semiconductor layer, and a second semiconductor layer coupled to the first dielectric layer. The second semiconductor layer includes a base portion substantially aligned with the first dielectric layer and a cantilever portion protruding from an end of the first dielectric layer. The cantilever portion includes a tapered surface tapering from a bottom surface of the second semiconductor layer toward a top surface of the second semiconductor layer.

The present invention relates to the field of semiconductor technology and provides a method for forming an MEMS cavity structure, which can improve process yield for MEMS integration and encapsulation for functional stability and reliability of the MEMS structure. The method includes steps of: forming an adhesion material layer on a bottom layer; forming a bottom layer on a substrate; forming a adhesion material layer on the bottom layer; forming a support structure and a sacrificial layer that is filled in a space surrounded by the support structure on the adhesion material layer; forming a capping layer on the support structure and the sacrificial layer, and the bottom layer, the support structure and the capping layer together defining a cavity; and releasing the sacrificial layer and the adhesion material layer to form the cavity structure.

A method includes forming an etch stop layer over a first side of a device wafer. The method also includes forming a polysilicon layer over the etch stop layer. A handle wafer is fusion bonded to the first side of the device wafer. A eutectic bond layer is formed on a second side of the device wafer. A micro-electro-mechanical system (MEMS) features are etched into the second side of the device wafer to expose the etch stop layer. The exposed etch stop layer is removed to expose the polysilicon layer. The exposed polysilicon layer is removed to expose a cavity formed between the handle wafer and the device wafer.

A method for etching a curved substrate is provided, including: forming a conductive thin film layer with an etched pattern on the curved substrate; supplying power to the conductive thin film layer such that the conductive thin film layer has an equal potential at each position of the conductive thin film layer; etching each position of the curved substrate to an etching depth corresponding to the potential at each position of the conductive thin film layer based on the etched pattern of the conductive thin film layer, so as to obtain the curved substrate having a consistent etching depth at each position of the curved substrate. With the etching method, it is possible to etch an arbitrary curved surface to obtain a microstructure with a uniform processing depth.

A semiconductor wafer has formed within it a plurality of piston tops of equal area. Each of the piston tops includes a thin flat region from which a majority of the thickness of the original semiconductor wafer may have been removed. A first one of the piston tops has a lower thickness than a second one of the piston tops. The second piston top has at least one hole in it, the volume of the hole corresponding to the difference in thickness between the first and second piston tops, such that the masses of the first and second piston tops differ by less than the variation in thickness between them.

A device includes a first layer of an electrically insulating material and a second layer of a non-electrically insulating material (e.g., semiconductor or electrically conductive) extending on the first layer. The second layer is structured so as to define opposite, lateral walls of a microchannel, a bottom wall of which is defined by an exposed surface of the first layer. The second layer is further structured to form one or more electrical insulation barriers; each barrier includes a line of through holes, each surrounded by an oxidized region of the material of the second layer. The through holes alternate with oxidized portions of the oxidized region along the line. Each barrier extends, as a whole, laterally across the second layer up to one of the lateral walls and delimits two sections of the second layer on each side of the barrier and on a same side of the microchannel.