The invention relates to a silicon-based component with at least one reduced contact surface which, formed from a method combining at least one oblique side wall etching step with a “Bosch” etch of vertical side walls, improves, in particular, the tribology of components formed by micromachining a silicon-based wafer.

A semiconductor package structure includes an electronic device having an exposed region adjacent to a first surface, a dam surrounding the exposed region of the semiconductor die and disposed on the first surface, the dam having a top surface away from the first surface, an encapsulant encapsulating the first surface of the electronic device, exposing the exposed region of the electronic device. A surface of the dam is retracted from a top surface of the encapsulant. A method for manufacturing the semiconductor package structure is also provided.

Various embodiments of the present disclosure are directed towards a method to roughen a crystalline layer. A crystalline layer is deposited over a substrate. A mask material is diffused into the crystalline layer along grain boundaries of the crystalline layer. The crystalline layer and the mask material may, for example, respectively be or comprise polysilicon and silicon oxide. Other suitable materials are, however, amenable. An etch is performed into the crystalline layer with an etchant having a high selectivity for the crystalline layer relative to the mask material. The mask material defines micro masks embedded in the crystalline layer along the grain boundaries. The micro masks protect underlying portions of the crystalline layer during the etch, such that the etch forms trenches in the crystalline layer where unmasked by the micro masks.

The present disclosure provides a packaging method, including: providing a first semiconductor substrate; forming a bonding region on the first semiconductor substrate, wherein the bonding region of the first semiconductor substrate includes a first bonding metal layer and a second bonding metal layer; providing a second semiconductor substrate having a bonding region, wherein the bonding region of the second semiconductor substrate includes a third bonding layer; and bonding the first semiconductor substrate to the second semiconductor substrate by bringing the bonding region of the first semiconductor substrate in contact with the bonding region of the second semiconductor substrate; wherein the first and third bonding metal layers include copper (Cu), and the second bonding metal layer includes Tin (Sn). An associated packaging structure is also disclosed.

This disclosure provides methods and apparatus related to thin films. In one aspect, a silicon wafer with a first silicon nitride layer disposed on a first side of the silicon wafer and a second silicon nitride layer disposed on a second side of the silicon wafer is provided. A first side of the first silicon nitride layer is disposed on the first side of the silicon wafer. The second silicon nitride layer is patterned. The silicon wafer is etched to expose the first side of the first silicon nitride layer. A polymer is deposited on a second side of the first silicon nitride layer. A first ceramic layer is deposited on the polymer disposed on the second side of the first silicon nitride layer using an atomic layer deposition process. The first silicon nitride layer and the polymer are etched to expose a first side of the first ceramic layer.

A sensor has an electronic chip and a sensor chip which are arranged within a functional volume which is at the most 4-5 mm long, a maximum 2-3 mm wide, and the maximum height is 0.5-0.8 mm, thereby potentially providing a compact sensor.

MEMS switches and methods of manufacturing MEMS switches is provided. The MEMS switch having at least two cantilevered electrodes having ends which overlap and which are structured and operable to contact one another upon an application of a voltage by at least one fixed electrode.

The present invention provides a method for preparing a micro-cavity array surface with an inclined smooth bottom surface based on an air molding method. The method includes: preparing a micro-cavity array surface; preparing an auxiliary microstructure polymer template, and performing plasma treatment on the auxiliary microstructure polymer template; uniformly spreading a layer of a liquid polymer film to be formed on the auxiliary microstructure polymer template subjected to the plasma treatment; placing a gap bead in an empty position on the micro-cavity array surface; placing the auxiliary microstructure polymer template spread with the liquid polymer film on the gap bead on the micro-cavity array surface, maintaining this state, and feeding the auxiliary microstructure polymer template into a vacuum drying oven; and heating and solidifying the liquid polymer film, and separating the micro-cavity array surface to obtain the micro-cavity array surface with the inclined smooth bottom surface.

A method for processing a silicon substrate includes forming a structure having a bottom surface and a depth of 200 μm or more or 300 μm or more from a first surface of a silicon substrate, forming a protective film on an inner wall of the structure, and performing plasma etching so as to selectively remove the protective film disposed on the bottom surface of the structure with respect to the protective film disposed on the substantially perpendicular side wall of the structure, wherein the plasma etching is performed under the condition in which plasma with a sheath length at least 10 times the depth when the depth is 200 μm or more, or at least 5 time the depth when the depth is 300 μm or more, is generated and a mean free path of ions generated in the plasma is longer than the sheath length.

The present invention generally relates to an ovenized platform and a fabrication process thereof. Specifically, the invention relates to an ovenized hybrid Si/SiO.sub.2 platform compatible with typical CMOS and MEMS fabrication processes and methods of its manufacture. Embodiments of the invention may include support arms, CMOS circuitry, temperature sensors, IMUs, and/or heaters among other elements.