An optical electronics device includes first, second and third wafers. The first wafer has a semiconductor substrate with a dielectric layer on a side of the semiconductor substrate. The second wafer has a transparent substrate with an anti-reflective coating on a side of the transparent substrate. The first wafer is bonded to the second wafer at a silicon dioxide layer between the semiconductor substrate and the anti-reflective coating. The first and second wafers include a cavity extending from the dielectric layer through the semiconductor substrate and through the silicon dioxide layer to the anti-reflective coating. The third wafer includes micromechanical elements. The third wafer is bonded to the dielectric layer, and the micromechanical elements are contained within the cavity.

A micro-device including at least one first element comprising at least: a portion of material corresponding to a compound of at least one semi-conductor and at least one metal, first and second protective layers each covering one of two opposite faces of said portion of material, such that the first and second protective layers are in direct contact with said portion of material, that the first protective layer comprises at least one first material able to withstand an HF etching, that the second protective layer comprises at least one second material able to withstand the HF etching, and that at least one of the first and second materials able to withstand the HF etching includes the semi-conductor.

A method includes forming a first mask on a first portion of a first surface of a substrate, forming a second mask on the first mask and further forming the second mask on a second portion of the first surface of the substrate, and etching an exposed portion of the first surface of the substrate and removing the second mask. According to some embodiments, an exposed portion of the first surface of the substrate is etched and the first mask is removed. An oxide layer is formed on the first surface of the substrate. A third mask is formed on the oxide layer except for a portion of the oxide layer corresponding to bumpstop features. The portion of the oxide layer corresponding to the bumpstop features is removed. An exposed portion of the first surface of the substrate is etched and the third mask is removed.

Example sensor apparatus for microfluidic devices and related methods are disclosed. In examples disclosed herein, a method of fabricating a sensor apparatus for a microfluidic device includes etching a portion of an intermediate layer to form a sensor chamber in a substrate assembly, where the substrate assembly has a base layer and the intermediate layer, and where the base layer comprises a first material and the intermediate layer comprises a second material different than the first material. The method includes forming a first electrode and a second electrode in the sensor chamber. The method also includes forming a fluidic transport channel in fluid communication with the sensor chamber, where the fluidic transport channel comprises a third material different than the first material and the second material.

A MEMS structure includes a substrate, an inter-dielectric layer on a front side of the substrate, a MEMS component on the inter-dielectric layer, and a chamber disposed within the inter-dielectric layer and through the substrate. The chamber has an opening at a backside of the substrate. An etch stop layer is disposed within the inter-dielectric layer. The chamber has a ceiling opposite to the opening and a sidewall joining the ceiling. The sidewall includes a portion of the etch stop layer.

A method includes forming a first mask on a first portion of a first surface of a substrate, forming a second mask on the first mask and further forming the second mask on a second portion of the first surface of the substrate, and etching an exposed portion of the first surface of the substrate and removing the second mask. According to some embodiments, an exposed portion of the first surface of the substrate is etched and the first mask is removed. An oxide layer is formed on the first surface of the substrate. A third mask is formed on the oxide layer except for a portion of the oxide layer corresponding to bumpstop features. The portion of the oxide layer corresponding to the bumpstop features is removed. An exposed portion of the first surface of the substrate is etched and the third mask is removed.

A micromechanical component for a sensor and/or microphone device. The component has an adjustable first actuator electrode suspended on a regionally deformable first layer, a first stator electrode fastened so that a first measuring signal is able to be tapped with regard to a first voltage or capacitance applied between the first actuator electrode and the first stator electrode, and a second actuator electrode, so that a second measuring signal is able to be tapped with regard to a second voltage or capacitance applied between the second actuator electrode and the first stator electrode or between the second actuator electrode and the second stator electrode. The second actuator electrode is situated in an adjustable manner on a side of the first actuator electrode facing away from the first layer in that the second actuator electrode is suspended on the first actuator electrode and/or an at least regionally deformable second layer.

The disclosure relates to a method for manufacturing a planarized etch-stop layer, ESL, for a hydrofluoric acid, HF, vapor phase etching process. The method includes providing a first planarized layer on top of a surface of a substrate, the first planarized layer having a patterned and structured metallic material and a filling material. The method further includes comprises depositing on top of the first planarized layer the planarized ESL of an ESL material with low HF etch rate, wherein the planarized ESL has a low surface roughness and a thickness of less than 150 nm, in particular of less than 100 nm.

An optical electronics device includes first, second and third wafers. The first wafer has a semiconductor substrate with a dielectric layer on a side of the semiconductor substrate. The second wafer has a transparent substrate with an anti-reflective coating on a side of the transparent substrate. The first wafer is bonded to the second wafer at a silicon dioxide layer between the semiconductor substrate and the anti-reflective coating. The first and second wafers include a cavity extending from the dielectric layer through the semiconductor substrate and through the silicon dioxide layer to the anti-reflective coating. The third wafer includes micromechanical elements. The third wafer is bonded to the dielectric layer, and the micromechanical elements are contained within the cavity.

A through silicon interposer wafer and method of manufacturing the same. A through silicon interposer wafer having at least one cavity formed therein for MEMS applications and a method of manufacturing the same are provided. The through silicon interposer wafer includes one or more filled silicon vias formed sufficiently proximate to the at least one cavity to provide support for walls of the at least one cavity during subsequent processing of the interposer wafer.