A shift circuit operating by using a capacitor, a printing head and printing device thereof. The shift circuit includes a power signal line, a grounding signal line, a first shift signal line, a second shift signal line, a plurality of diodes, a plurality of grounding resistors, a plurality of thyristors, a cascaded resistor and a capacitor. The capacitor connects between the gate of the first thyristor and the first shift signal line. Therefore, the capacitor is charged during the off time of the period of the first clock signal, and starts to be discharged from an edge between the on time and the off time of the period of the first clock signal. During the on time of the period, the capacitor is fully discharged. Such that, the gate voltage of the first thyristor is sufficient to turn on the first thyristor and will not affect the following shift action.

A liquid discharge apparatus includes a liquid discharge head configured to discharge a liquid, a first wire and a second wire to which a first drive signal and a second drive signal for driving the liquid discharge head is respectively supplied, and a single relay substrate configured to relay the first drive signal and the second drive signal from the first wire and the second wire to the liquid discharge head. The single relay substrate includes a first connector configured to be connected to the first wire, a second connector configured to be connected to the second wire, and a relay connector configured to be connected to a head-side connector of the liquid discharge head. The relay connector outputs, to the head-side connector, the first drive signal supplied from the first wire to the first connector, and the second drive signal supplied from the second wire to the second connector.

A fluidic die includes a sense architecture having a global sense block to provide an analog reference signal and an array of distributed sense blocks. Each distributed sense block is to receive a same set of addresses via an address bus and each is to receive a corresponding sense enable signal having an enable value or a disable value. Each distributed sense block includes an array of sensors, each sensor corresponding to a different address of the set of addresses and a sample circuit to apply the analog reference signal to the sensor corresponding to the address on the address bus when the corresponding sense enable signal has the enable value, and provide to the global sense block an analog sense signal from the sensor resulting from application of the analog reference signal.

A print head control circuit includes a first diagnosis signal propagation wiring for propagating a first diagnosis signal, a fifth diagnosis signal propagation wiring for propagating a fifth diagnosis signal indicating a diagnosis result, and a second voltage signal propagation wiring for propagating a second voltage signal. The fifth diagnosis signal propagation wiring and the second voltage signal propagation wiring are electrically coupled to each other via a fifth terminal and a seventh terminal, and the first diagnosis signal propagation wiring and the second diagnosis signal propagation wiring are located to be aligned. The first diagnosis signal propagation wiring and the second voltage signal propagation wiring are located to be adjacent to each other in a direction in which the first diagnosis signal propagation wiring and the second diagnosis signal propagation wiring are aligned.

The present subject matter relates to disposing memory banks and select register. In an example implementation, a plurality of memory banks is arranged to form a group of memory banks. Each memory bank includes a plurality of memory units. At least one select register generates a select signal to access the memory units in the plurality of memory banks. The at least one select register is disposed at an end of the group of memory banks.

A liquid discharge apparatus includes a liquid discharge head configured to discharge a liquid, a first wire and a second wire to which a first drive signal and a second drive signal for driving the liquid discharge head is respectively supplied, and a single relay substrate configured to relay the first drive signal and the second drive signal from the first wire and the second wire to the liquid discharge head. The single relay substrate includes a first connector configured to be connected to the first wire, a second connector configured to be connected to the second wire, and a relay connector configured to be connected to a head-side connector of the liquid discharge head. The relay connector outputs, to the head-side connector, the first drive signal supplied from the first wire to the first connector, and the second drive signal supplied from the second wire to the second connector.

A fluid ejection device may include a substrate, a first group of fluid drivers on the substrate, a second group of fluid drivers on the substrate, a memory element storing a predetermined offset value and electronics to receive an address of one of the fluid drivers of the first group for actuation control. The electronics may select one of the fluid drivers of the second group for actuation control based on the address and the stored offset value.

An integrated circuit to drive a plurality of fluid actuation devices includes an interface, a digital circuit, an analog circuit, and control logic. The digital circuit outputs a digital signal to the interface. The analog circuit outputs an analog signal to the interface. The control logic activates the digital circuit or the analog circuit.

A liquid discharge apparatus includes a discharge head, a drive substrate provided with a signal generation circuit to generate a first and a second signal and an output connector to output the first and second signal, a first and second wire to supply the first and second signal to the discharge head, and a relay substrate to relay the first and second signal from the drive substrate to the first and second wire. The relay substrate includes a relay connector to be connected to the output connector, a first connector to be connected to the first wire and to output the first signal supplied from the output connector to the relay connector to the first wire, and a second connector to be connected to the second wire and to output the second signal supplied from the output connector to the relay connector to the second wire.

An ink jet printer includes an ink jet head and an ink jet head control circuit supplying a control signal to control the ink jet head. The ink jet head includes a nozzle, an ink chamber, an actuator configured to change a pressure of the ink chamber to eject ink from the nozzle, a driver circuit that is connected to a signal line on which the control signal is supplied and configured to generate a drive waveform for driving the actuator according to the control signal, and a non-volatile memory connected to the signal line and configured to store information of the ink jet head. The ink jet head control circuit includes a drive control circuit connected to the signal line and configured to output the control signal to the signal line, and a non-volatile memory control circuit that accesses the non-volatile memory via the signal line.