An integrated circuit includes thermal tracking logic, control logic, and an output interface. The thermal tracking logic determines a temperature of a fluid ejection die. The control logic defines an emulated parameter of the fluid ejection die as a function of the temperature of the fluid ejection die. The output interface outputs the emulated parameter to a printer system based on the function and the temperature of the fluid ejection die.

A logic circuitry package for a replaceable print apparatus component includes an I2C interface to communicate with a print apparatus logic circuit and at least one logic circuit. The at least one logic circuit is configured to respond to communications over the I2C interface that are directed to an initial or reconfigured I2C address. The at least one logic circuit is configured to receive, via the I2C interface, a write command to a first memory address of the logic circuit to initiate a first function of the logic circuit. The at least one logic circuit is configured to generate first data in response to the first function. The at least one logic circuit is configured to receive, via the I2C interface, a first read command to a second memory address of the logic circuit. The at least one logic circuit is configured to transmit, via the I2C interface, the first data in response to the first read command to the second memory address.

An element substrate comprises a plurality of stages of shift registers that inputs and holds a serial data signal; a latch circuit that latches the serial data held by the shift registers; a decoder circuit that inputs an output of the latch circuit and outputs a selection signal for selecting a block of the print elements or the memory elements; and a mask circuit that masks the output of the selection signal for selecting the block of the memory elements from the decoder circuit in accordance with an input bit data signal. The block of the print elements or the memory elements includes a plurality of print elements or memory elements in which one element is selected in each of the plurality of groups.

A print component integrated circuitry package includes a number of temperature sensors where each of the plurality of the temperature sensors is disposed in a corresponding temperature region of an integrated circuitry. In an example, an analog sense bus conductively connects to all of the plurality of temperature sensors and an external sensor pad that is to connect to a corresponding print controller contact.

A fluid ejection controller interface includes input logic to receive control data packets and a first clock signal, each control data packet including a set of primitive data bits and a set of random bits, wherein the input logic identifies the random bits in the received control data packets to facilitate the creation of modified control data packets. The fluid ejection controller interface includes a clock signal generator to generate a second clock signal that is different than the first clock signal, and output logic to receive the modified control data packets, and output the modified control data packets to a fluid ejection controller of a fluid ejection device based on the second clock signal.

There is provided droplet discharging apparatus including: nozzle configured to discharge liquid by energy generating element; first signal generator configured to generate, based on first and second data representing first and second driving waveforms, first time division multiplex signal; first separator configured to separate first or second driving waveform signal representing the first or second driving waveform from the first time division multiplex signal; second signal generator configured to generate, based on third and fourth data representing third and fourth driving waveforms, second time division multiplex signal; and second separator configured to separate third or fourth driving waveform signal representing the third or fourth driving waveform from the second time division multiplex signal. The energy generating element is driven by the first or second driving waveform signal separated by the first separator, or by the third or fourth driving waveform signal separated by the second separator.

A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit and at least one logic circuit including a memory storing a reference parameter. The at least one logic circuit is configured to receive, via the interface, a first request sent to a first address to read the reference parameter; and transmit, via the interface, the reference parameter in response to the first request. The at least one logic circuit is configured to receive, via the interface, a second request sent to a second address to implement a task; and implement the task to output a digital value via the interface in response to the second request. The reference parameter corresponds to the digital value.

A logic circuitry package includes an interface to communicate with a print apparatus logic circuit and at least one logic circuit. The logic circuit is configured to receive, via the interface, a plurality of first requests in a heater disabled mode, each first request corresponding to a different sensor ID of a plurality of sensor IDs; transmit, via the interface, a first digital value in response to each first request; receive, via the interface, a plurality of second requests in a heater enabled mode, each second request corresponding to a different sensor ID of the plurality of sensor IDs; and transmit, via the interface, a second digital value in response to each second request. Delta values corresponding to a difference between the first digital value and the second digital value for each different sensor ID of the plurality of sensor IDs are indicative of a print material level.

A logic circuitry package for a replaceable print apparatus component includes an interface to communicate with a print apparatus logic circuit and at least one logic circuit. The at least one logic circuit is configured to receive, via the interface, a request to replace an internal clock signal from an internal clock generator of the logic circuitry package with an external test clock signal. The at least one logic circuit is configured to receive, via the interface, the external test clock signal. The at least one logic circuit is configured to replace the internal clock signal with the external test clock signal in the logic circuitry package.

A logic circuitry package for a replaceable print apparatus component comprises at least one logic circuit and an interface to communicate with a print apparatus logic circuit. The at least one logic circuit is configured to receive, via the interface, calibration parameters including an offset parameter and a sensor ID. The at least one logic circuit is configured to output, via the interface, a digital value corresponding to the sensor ID and offset based on the offset parameter.