A transparent electrode with a transparent substrate and a composite layer disposed thereon, wherein the composite layer includes a graphene layer and a plurality of nanoparticles, wherein the nanoparticles are embedded in the graphene layer and extend through a thickness of the graphene layer, and wherein the plurality of nanoparticles are in direct contact with the transparent substrate and a gap is present between the graphene layer and the transparent substrate.

A transparent electrode with a transparent substrate and a composite layer disposed thereon, wherein the composite layer includes a graphene layer and a plurality of nanoparticles, wherein the nanoparticles are embedded in the graphene layer and extend through a thickness of the graphene layer, and wherein the plurality of nanoparticles are in direct contact with the transparent substrate and a gap is present between the graphene layer and the transparent substrate.

The invention relates to a device for the transfer of a transfer layer from a substrate, in particular from a growth substrate, to a carrier substrate.

The invention relates to a device for the transfer of a transfer layer from a substrate, in particular from a growth substrate, to a carrier substrate.

A method of manufacturing a diamond substrate includes: forming an ion implantation layer at a side of a main surface of a diamond seed substrate by implanting ions into the main surface of the diamond seed substrate; producing a diamond structure by growing a diamond growth layer by a vapor phase synthesis method on the main surface of the diamond seed substrate, after implanting the ions; and performing heat treatment on the diamond structure. The performed heat treatment causes the diamond structure to be separated along the ion implantation layer into a first structure including the diamond seed substrate and failing to include the diamond growth layer, and a diamond substrate including the diamond growth layer. Thus, the method of manufacturing a diamond substrate is provided that enables a diamond substrate with a large area to be manufactured in a short time and at a low cost.

A method of manufacturing a diamond substrate includes: forming an ion implantation layer at a side of a main surface of a diamond seed substrate by implanting ions into the main surface of the diamond seed substrate; producing a diamond structure by growing a diamond growth layer by a vapor phase synthesis method on the main surface of the diamond seed substrate, after implanting the ions; and performing heat treatment on the diamond structure. The performed heat treatment causes the diamond structure to be separated along the ion implantation layer into a first structure including the diamond seed substrate and failing to include the diamond growth layer, and a diamond substrate including the diamond growth layer. Thus, the method of manufacturing a diamond substrate is provided that enables a diamond substrate with a large area to be manufactured in a short time and at a low cost.

A process for manufacturing a composite structure comprises: a) providing an initial substrate made of monocrystalline silicon carbide, b) epitaxially growing a monocrystalline silicon carbide donor layer on the initial substrate to form a donor substrate 111, c) implanting ions into the donor layer to form a buried brittle plane defining the the donor layer, d) depositing, using liquid injection-chemical vapor deposition at a temperature below 1000° C., a carrier layer on the donor layer, the carrier layer comprising an at least partially amorphous SiC matrix, e) separating the donor substrate along the brittle plane to form an intermediate composite structure comprising the donor layer on the carrier layer f) heat treating the intermediate composite structure at a temperature of between 1000° C. and 1800° C. to crystallize the carrier layer and form the polycrystalline carrier substrate, and g) applying mechanical and/or chemical treatment(s) of the composite structure.

A process for manufacturing a composite structure comprises: a) providing an initial substrate made of monocrystalline silicon carbide, b) epitaxially growing a monocrystalline silicon carbide donor layer on the initial substrate to form a donor substrate 111, c) implanting ions into the donor layer to form a buried brittle plane defining the the donor layer, d) depositing, using liquid injection-chemical vapor deposition at a temperature below 1000° C., a carrier layer on the donor layer, the carrier layer comprising an at least partially amorphous SiC matrix, e) separating the donor substrate along the brittle plane to form an intermediate composite structure comprising the donor layer on the carrier layer f) heat treating the intermediate composite structure at a temperature of between 1000° C. and 1800° C. to crystallize the carrier layer and form the polycrystalline carrier substrate, and g) applying mechanical and/or chemical treatment(s) of the composite structure.

A stack including at least a semiconductor drift layer stacked on a single-crystal diamond substrate having a coalescence boundary, wherein the coalescence boundary of the single-crystal diamond substrate is a region that exhibits, in a Raman spectrum at a laser excitation wavelength of 785 nm, a full width at half maximum of a peak near 1332 cm.sup.−1 due to diamond that is observed to be broader than a full width at half maximum of the peak exhibited by a region different from the coalescence boundary, the coalescence boundary has a width of 200 μm or more, and the semiconductor drift layer is stacked on at least the coalescence boundary.

A stack including at least a semiconductor drift layer stacked on a single-crystal diamond substrate having a coalescence boundary, wherein the coalescence boundary of the single-crystal diamond substrate is a region that exhibits, in a Raman spectrum at a laser excitation wavelength of 785 nm, a full width at half maximum of a peak near 1332 cm.sup.−1 due to diamond that is observed to be broader than a full width at half maximum of the peak exhibited by a region different from the coalescence boundary, the coalescence boundary has a width of 200 μm or more, and the semiconductor drift layer is stacked on at least the coalescence boundary.