A periodic table Group 13 metal nitride crystals grown with a non-polar or semi-polar principal surface have numerous stacking faults. The purpose of the present invention is to provide a period table Group 13 metal nitride crystal wherein the occurrence of stacking faults of this kind are suppressed. The present invention achieves the foregoing by a periodic table Group 13 metal nitride crystal being characterized in that, in a Qx direction intensity profile that includes a maximum intensity and is derived from an isointensity contour plot obtained by x-ray reciprocal lattice mapping of (100) plane of the periodic table Group 13 metal nitride crystal, a Qx width at 1/300th of peak intensity is 6×10.sup.−4 rlu or less.

Embodiments of the invention generally relate processes for epitaxial growing Group III/V materials at high growth rates, such as about 30 μm/hr or greater, for example, about 40 μm/hr, about 50 μm/hr, about 55 μm/hr, about 60 μm/hr, or greater. The deposited Group III/V materials or films may be utilized in solar, semiconductor, or other electronic device applications. In some embodiments, the Group III/V materials may be formed or grown on a sacrificial layer disposed on or over the support substrate during a vapor deposition process. Subsequently, the Group III/V materials may be removed from the support substrate during an epitaxial lift off (ELO) process. The Group III/V materials are thin films of epitaxially grown layers which contain gallium arsenide, gallium aluminum arsenide, gallium indium arsenide, gallium indium arsenide nitride, gallium aluminum indium phosphide, phosphides thereof, nitrides thereof, derivatives thereof, alloys thereof, or combinations thereof.

Embodiments of the invention generally relate processes for epitaxial growing Group III/V materials at high growth rates, such as about 30 μm/hr or greater, for example, about 40 μm/hr, about 50 μm/hr, about 55 μm/hr, about 60 μm/hr, or greater. The deposited Group III/V materials or films may be utilized in solar, semiconductor, or other electronic device applications. In some embodiments, the Group III/V materials may be formed or grown on a sacrificial layer disposed on or over the support substrate during a vapor deposition process. Subsequently, the Group III/V materials may be removed from the support substrate during an epitaxial lift off (ELO) process. The Group III/V materials are thin films of epitaxially grown layers which contain gallium arsenide, gallium aluminum arsenide, gallium indium arsenide, gallium indium arsenide nitride, gallium aluminum indium phosphide, phosphides thereof, nitrides thereof, derivatives thereof, alloys thereof, or combinations thereof.

A method for producing a Group III nitride semiconductor comprising forming mesas on a main surface of a substrate, and growing Group III nitride semiconductor in a c-axis direction thereof, wherein the plane most parallel to the side surfaces of the mesas or the dents among the low-index planes of growing Group III nitride semiconductor is a m-plane (1-100), and when a projected vector obtained by orthogonally projecting a normal vector of the processed side surface to the main surface is defined as a lateral vector, an angle between the lateral vector and a projected vector obtained by orthogonally projecting a normal vector of the m-plane of the growing Group III nitride semiconductor to the main surface is 0.5° or more and 6° or less.

A semiconductor device includes: a substrate; and an n-type layer including a nitride semiconductor formed on the surface of the substrate. In the n-type layer, the concentration of donor impurities (excluding O) is 1×10.sup.15 cm.sup.−3 or more and 1×10.sup.20 cm.sup.−3 or less, the concentration of C impurities is 1×10.sup.16 cm.sup.−3 or less, the concentration of O impurities is 1×10.sup.16 cm.sup.−3 or less, the concentration of Ca impurities is 1×10.sup.16 cm.sup.−3 or less, and the sum total of the concentrations of the C impurities, the O impurities, and the Ca impurities is lower than the concentration of the donor impurities. Such a semiconductor device can be fabricated by using a halogen-free vapor phase epitaxy (HF-VPE) device.

According to one embodiment, a nitride crystal includes first, second, and third nitride crystal regions. The third nitride crystal region includes Al, and is provided between the first and second nitride crystal regions. A third oxygen concentration in the third nitride crystal region is greater than a first oxygen concentration in the first nitride crystal region and greater than a second oxygen concentration in the second nitride crystal region. A third carbon concentration in the third nitride crystal region is greater than a first carbon concentration in the first nitride crystal region and greater than a second carbon concentration in the second nitride crystal region. A <0001> direction of the first nitride crystal region is one of a first orientation from the second nitride crystal region toward the first nitride crystal region or a second orientation from the first nitride crystal region toward the second nitride crystal region.

A vapor deposition apparatus includes an exhaust regulator provided in an exhaust pipe to regulate exhaust of the reaction chamber and including: a hollow frustum upstream baffle having a larger first opening near a reaction chamber than a second opening near an exhaust device; and a hollow frustum downstream baffle provided near the exhaust device with respect to the upstream baffle and having a larger third opening near the reaction chamber than a fourth opening near the exhaust device. The upstream baffle and downstream baffle are designed so that B/A and C/A are 0.33 or less, at least one of B/A and C/A is 0.26 or less, and (B+C)/A is 0.59 or less, where an inner diameter of the exhaust pipe and diameters of the first and third openings are A, a diameter of the second opening is B and a diameter of the fourth opening is C.

A method comprises forming a single-crystal-like metal layer on a metal seed layer, the metal seed layer formed on a carrier wafer. The method comprises forming a first bonding layer on the single-crystal-like metal layer. The method also comprises forming a second bonding layer on a dielectric layer of a target substrate, the target substrate comprising one or more recording head subassemblies. The bonding layers may include diffusion layers or dielectric bonding layers. The method further comprises flipping and joining the carrier wafer with the target substrate such that the first and second diffusion layers are bonded and the single-crystal-like metal layer is integrated with the recording head as a near-field transducer.

A gallium nitride substrate comprising a first main surface and a second main surface opposite thereto, wherein the first main surface is a non-polar or semi-polar plane, a dislocation density measured by a room-temperature cathode luminescence method in the first main surface is 1×10.sup.4 cm.sup.−2 or less, and an averaged dislocation density measured by a room-temperature cathode luminescence method in an optional square region sizing 250 μm×250 μm in the first main plan is 1×10.sup.6 cm.sup.−2 or less.

A gallium nitride substrate comprising a first main surface and a second main surface opposite thereto, wherein the first main surface is a non-polar or semi-polar plane, a dislocation density measured by a room-temperature cathode luminescence method in the first main surface is 1×10.sup.4 cm.sup.−2 or less, and an averaged dislocation density measured by a room-temperature cathode luminescence method in an optional square region sizing 250 μm×250 μm in the first main plan is 1×10.sup.6 cm.sup.−2 or less.