A method for increasing the conductivity of a metal oxide with crystal structure belonging to the 4/m 32/m point group is provided. Single crystal oxides with crystal structure belonging to 4/m 32/m point group are contacted with nitrogen gas, with oxygen gas, with nitrogen gas, with oxygen gas, then with nitrogen gas to increase the conductivity of the metal oxide with crystal structure belonging to the 4/m 32/m point group.

A biomedical implant (16, 18) is formed from magnesium (Mg) single crystal (10). The biomedical implant (16, 18) may be biodegradable. The biomedical implant (16, 18) may be post treated to control the mechanical properties and/or corrosion rate thereof said Mg single crystal (10) without changing the chemical composition thereof. A method of making a Mg single crystal (10) for biomedical applications includes filling a single crucible (12) with more than one chamber with polycrystalline Mg, melting at least a portion of said polycrystalline Mg, and forming more than one Mg single crystal (10) using directional solidification.

Disclosed are a modified nanocrystalline strip, a preparation method therefor, and an application thereof. The preparation method comprises: performing rolling treatment on a nanocrystalline strip with a double-sided adhesive adhered on one side to obtain a micro-crushed nanocrystalline strip; performing acid etching surface treatment on the obtained micro-crushed nanocrystalline strip; performing alkaline washing surface treatment on the nanocrystalline strip subjected to acid etching surface treatment; sequentially washing with water and washing with alcohol the nanocrystalline strip obtained by the alkaline washing surface treatment, and then drying same; and performing micro-oxidation treatment on the dried nanocrystalline strip to obtain a modified nanocrystalline strip.

Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-κ layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-κ layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.

Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-κ layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-κ layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.

A silicon carbide ingot producing method is provided. The method produces a silicon carbide ingot in which an internal space of a reactor is depressurized and heated to create a predetermined difference in temperature between upper and lower portions of the internal space. The method produces a silicon carbide ingot in which a plane of a seed crystal corresponding to the rear surface of the silicon carbide ingot is lost minimally. Additionally, the method produces a silicon carbide ingot with few defects and good crystal quality.

A biomedical implant (16, 18) is formed from magnesium (Mg) single crystal (10). The biomedical implant (16, 18) may be biodegradable. The biomedical implant (16, 18) may be post treated to control the mechanical properties and/or corrosion rate thereof said Mg single crystal (10) without changing the chemical composition thereof. A method of making a Mg single crystal (10) for biomedical applications includes filling a single crucible (12) with more than one chamber with polycrystalline Mg, melting at least a portion of said polycrystalline Mg, and forming more than one Mg single crystal (10) using directional solidification.

Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-κ layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-κ layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.

The present disclosure provides a method for preparing heterostructure, which includes providing a donor substrate and forming a sacrificial layer on a surface of the donor substrate; forming a thin film cover layer on a surface of the sacrificial layer, wherein a top surface of the thin film cover layer is an implantation surface; performing ion implantation from the implantation surface, such that a defect layer is formed in the sacrificial layer; providing an acceptor substrate, and bonding the acceptor substrate to the implantation surface of the thin film cover layer; removing the sacrificial layer along the defect layer. The method for preparing the heterostructure of the present disclosure can successfully transfer the thin film cover layer to the acceptor substrate. The present disclosure can provide a compliant substrate, while the semiconductor donor substrate material can be reused, therefore is energy-efficient and environmental-friendly.

Semiconductor wafers useful for NAND circuitry and having a front side, a rear side, a middle and a periphery, have an Nv region which extends from the middle to the periphery; a denuded zone which extends from the front side to a depth of not less than 20 m into the interior of the semiconductor wafer, where the density of vacancies in the denuded zone, determined by means of platinum diffusion and DLTS is not more than 110.sup.13 vacancies/cm.sup.3; a concentration of oxygen of not less than 4.510.sup.17 atoms/cm.sup.3 and not more than 5.510.sup.17 atoms/cm.sup.3; a region in the interior of the semiconductor wafer which adjoins the denuded zone and has nuclei which can be developed by means of a heat treatment into BMDs having a peak density of not less than 6.010.sup.9/cm.sup.3, where the heat treatment comprises heating the semiconductor wafer to a temperature of 800 C. over a period of four hours and to a temperature of 1000 C. over a period of 16 hours. The wafers are produced by a unique RTA treatment of Nv wafers.