A ceramic joined body includes: a pair of ceramic plates; and an electrode layer that is interposed between the pair of ceramic plates, in which the electrode layer is embedded in at least one of the pair of ceramic plates, and in an outer edge of the electrode layer, a joint surface between the at least one of the pair of ceramic plates and the electrode layer has an inclination with respect to a thickness direction of the pair of ceramic plates and the electrode layer.

Method of manufacturing a metal-ceramic substrate (1) which, in the finished state, has a ceramic layer (11) and a metal layer (12) extending along a main extension plane (HSE) and arranged one above the other along a stacking direction (S) extending perpendicularly to the main extension plane (HSE) comprising providing the metal layer (12) and the ceramic layer (11) and bonding the metal layer (12) to the ceramic layer (11) in regions to form a first region (B1), which has a materially bonded connection between the metal layer (12) and the ceramic layer (11), and a second region (B2), in which the metal layer (12) and the ceramic layer (11) are arranged one above the other without a materially bonded connection, as seen in the stacking direction (S).

A ceramic electronic device includes a multilayer chip in which each of a plurality of dielectric layers of which a main component is ceramic, and each of a plurality of internal electrode layers are alternately stacked. The plurality of internal electrode layers include Ni, S and Sn.

A corrosion-resistant component configured for use with a semiconductor processing reactor, the corrosion-resistant component comprising: a) a ceramic insulating substrate; and, b) a white corrosion-resistant non-porous outer layer associated with the ceramic insulating substrate, the white corrosion-resistant non-porous outer layer having a thickness of at least 50 μm, a porosity of at most 1%, and a composition comprising at least 15% by weight of a rare earth compound based on total weight of the corrosion-resistant non-porous layer; and, c) an L* value of at least 90 as measured on a planar surface of the white corrosion-resistant non-porous outer layer. Methods of making are also disclosed.

An electrode embedded ceramic structure includes: a first ceramic layer; an electrode layer formed on the first ceramic layer; and a second ceramic layer covering the first ceramic layer and the electrode layer, the second ceramic layer being thinner than the first ceramic layer. In a cross section of the first ceramic layer, the electrode layer, and the second ceramic layer along a laminating direction in this electrode embedded ceramic structure, T1 and T2 satisfy Equation (T2−T1)/T2≤0.15, where T1 denotes a least thickness in the second ceramic layer, and T2 denotes an average thickness of the second ceramic layer.

An electrode embedded ceramic structure includes: a first ceramic layer; an electrode layer formed on the first ceramic layer; and a second ceramic layer covering the first ceramic layer and the electrode layer, the second ceramic layer being thinner than the first ceramic layer. In a cross section of the first ceramic layer, the electrode layer, and the second ceramic layer along a laminating direction in this electrode embedded ceramic structure, L1, L2, and L3 satisfy (L1+L2)/L3≥2.2, where L1 denotes a length of the electrode layer on the first ceramic layer, L2 denotes a length of the electrode layer on the second ceramic layer, and L3 denotes a length of the electrode layer in a direction orthogonal to the laminating direction.

A multilayer electronic component includes a body including a plurality of dielectric layers, side margin portions disposed on the body, and external electrodes disposed on the body. The reliability of the multilayer electronic component is improved by controlling the contents of Si for each position of the dielectric layer and the side margin portion.

A multilayer ceramic electronic component includes: a ceramic body including a dielectric layer having a main component represented by (Ba.sub.1-xCa.sub.x)(Ti.sub.1-y)(Zr, Sn, Hf).sub.y)O.sub.3 (where, 0≤x≤1, 0≤y≤0.5), and having a plurality of grains and grain boundaries disposed between the plurality of grains, and including first and second internal electrodes alternately stacked with the dielectric layer interposed therebetween; a first external electrode; and a second external electrode, wherein the dielectric layer includes a triple point in contact with three grain boundaries and a secondary phase of Si disposed inside the triple point, wherein a dispersion of an Si content at an interface between the dielectric layer and the internal electrode may be 1% by weight or less.

A dielectric ceramic composition includes a base material main component of barium titanate and a subcomponent. A microstructure of the dielectric ceramic composition after sintering includes a first grain having a Ca content of less than 3.5 at % and a second grain having a Ca content of 3.5 to 13.5 at %, and an area ratio of the second grain to an area of the total grains is 70% to 95%.

A dielectric ceramic composition includes a base material main component of barium titanate and a subcomponent. A microstructure of the dielectric ceramic composition after sintering includes a first grain having a Ca content of less than 3.5 at % and a second grain having a Ca content of 3.5 to 13.5 at %, and an area ratio of the second grain to an area of the total grains is 70% to 95%.