A piezoelectric device includes an actuator substrate that includes a plurality of piezoelectric element rows having a plurality of piezoelectric elements, and a wiring substrate that is disposed so as to face the actuator substrate. The piezoelectric element rows include a common electrodes common to the plurality of the piezoelectric elements. The actuator substrate includes a plurality of first common wirings connected to each of the common electrodes of the plurality of the piezoelectric element rows. The wiring substrate includes a plurality of second common wirings connected to each of the first common wirings of the plurality of piezoelectric element rows, and a plurality of auxiliary wirings buried in a groove portion formed in the wiring substrate. The auxiliary wirings are connected to each of the second common wirings, and the plurality of auxiliary wirings are not connected to each other.

A wiring substrate is provided with a surface wiring on at least one surface, a through hole which passes through the wiring substrate, and a through wiring which is formed in the through hole and is connected to a surface wiring, in which an inner surface of the through hole is a rough surface, and electric resistance of the through wiring is equal to or less than the electric resistance of the surface wiring.

A piezoelectric device includes an actuator substrate that includes two rows of piezoelectric element rows piezoelectric elements, and a wiring substrate that is disposed so as to face the actuator substrate. The piezoelectric element rows include individual electrodes disposed for each of the piezoelectric elements, and a common electrode common to the piezoelectric elements. The wiring substrate includes a core portion disposed on a surface on the actuator substrate side, an individual wiring portion disposed for each of the piezoelectric element rows that partially covers the core portion, and a common wiring portion disposed for each of the piezoelectric element rows that partially covers the core portion. The two rows of piezoelectric element rows are respectively disposed so as to interpose the core portion. The individual wiring portion and the common wiring portion are respectively electrically connected to the individual electrode and the common electrode.

A droplet ejecting device includes: a head including N-number drive elements; a driving circuit including N-number waveform signal selectors and N-number power supply circuit selectors; a plurality of power supply circuits connected to the driving circuit; and a control circuit. Each waveform signal selector selects a waveform signal to be outputted to the corresponding drive element from among a plurality of types of waveform signals. Each power supply circuit selectors selects a power supply circuit to be connected to the drive elements from among the plurality of power supply circuits. The control circuit serially transmits, to the driving circuit via a single control line: N-number items of waveform signal designation information each of which designates the waveform signal to be outputted to the corresponding drive element; and N-number items of power supply designation information each of which designates the power supply circuit to be connected to the corresponding drive element.

In some examples, a circuit for use with a memory element and a nozzle for outputting fluid, includes a data line, a fire line, and a selector responsive to the data line to select the memory element or the nozzle. The selector is to select the memory element responsive to the data line having a first value, and to select the nozzle responsive to the data line having a second value different from the first value. The fire line is to control activation of the nozzle in response to the nozzle being selected by the selector, and to communicate data of the memory element in response to the memory element being selected by the selector.

An integrated circuit to drive a number of fluid actuation devices, comprising a circuit configured to have a memory access state which can be set to one of an enabled state and disabled state. The integrated circuit to include a fluid actuation circuit to transmit selection information for a fluid actuation device, the selection information comprising a data state bit. The integrated circuit to include a memory cell array, configured so that each memory cell is accessible by the memory access state being enabled, and the data state bit being set.

An integrated circuit to drive a plurality of fluid actuation devices includes a configuration register, a plurality of interfaces, and control logic. The plurality of interfaces include a mode interface and a data interface. The control logic enables writing to the configuration register in response to a signal on the mode interface transitioning to logic high with a logic high signal on the data interface.

In some examples, a circuit for use with a memory element and a nozzle for outputting fluid, includes a data line, a fire line, and a selector responsive to the data line to select the memory element or the nozzle. The selector is to select the memory element responsive to the data line having a first value, and to select the nozzle responsive to the data line having a second value different from the first value. The fire line is to control activation of the nozzle in response to the nozzle being selected by the selector, and to communicate data of the memory element in response to the memory element being selected by the selector.

An integrated circuit to drive a number of fluid actuation devices, comprising a circuit configured to have a memory access state which can be set to one of an enabled state and disabled state. The integrated circuit to include a fluid actuation circuit to transmit selection information for a fluid actuation device, the selection information comprising a data state bit. The integrated circuit to include a memory cell array, configured so that each memory cell is accessible by the memory access state being enabled, and the data state bit being set.

A communicating print component a print head comprising a number of memory bits and a single lane analog bus conductively coupling the number of memory bits to a pad located on the exterior of the print head. The pad is to transmit an electrical signal from the number of memory bits, wherein the electrical signal indicates a combination of all selected bits of the number of memory bits.