The present invention provides a MEMS pressure sensor and a manufacturing method. The pressure is formed by a top cap wafer, a MEMS wafer and a bottom cap wafer. The MEMS wafer comprises a frame and a membrane, the frame defining a cavity. The membrane is suspended by the frame over the cavity. The bottom cap wafer closes the cavity. The top cap wafer has a recess defining with the membrane a capacitance gap. The top cap wafer comprises a top cap electrode located over the membrane and forming, together with the membrane, a capacitor to detect a deflection of the membrane. Electrical contacts on the top cap wafer are connected to the top cap electrode. A vent extends from outside of the sensor into the cavity or the capacitance gap. The pressure sensor can include two cavities and two capacitance gaps to form a differential pressure sensor.

An ultrasonic transducer includes a membrane, a bottom electrode, and a plurality of cavities disposed between the membrane and the bottom electrode, each of the plurality of cavities corresponding to an individual transducer cell. Portions of the bottom electrode corresponding to each individual transducer cell are electrically isolated from one another. Each portion of the bottom electrode corresponds to each individual transducer that cell further includes a first bottom electrode portion and a second bottom electrode portion, the first and second bottom electrode portions electrically isolated from one another.

An integrated device package is disclosed. The integrated device package can include a package housing that defines a cavity. The integrated device package can include an integrated device die that is disposed in the cavity. The integrated device die has a first surface includes a sensitive component. A second surface is free from a die attach material. The second surface is opposite the first surface. The integrated device die include a die cap that is bonded to the first surface. The integrated device package can also include a supporting structure that attaches the die cap to the package housing.

Various embodiments of the present disclosure are directed towards a method for manufacturing an integrated chip, the method comprises forming an interconnect structure over a semiconductor substrate. An upper dielectric layer is formed over the interconnect structure. An outgas layer is formed within the upper dielectric layer. The outgas layer comprises a first material that is amorphous. A microelectromechanical systems (MEMS) substrate is formed over the interconnect structure. The MEMS substrate comprises a moveable structure directly over the outgas layer.

A die attachment to a support is disclosed. In an embodiment, a semiconductor package includes a support and a die attached to the support by an adhesive on a backside of the die, wherein the die includes a capacitive pressure sensor integrated on a CMOS read-out circuit, and wherein the adhesive covers only a part of the backside of the die.

A first electronic component, such as a sensor having opposed first and second surfaces and a first thickness, is arranged on a support member with the second surface facing towards the support member. A second electronic component, such as an integrated circuit mounted on a substrate and having a second thickness less than the first thickness, is arranged on the support member with a substrate surface opposed the second electronic component facing towards the support member. A package molding material is molded onto the support member to encapsulate the second electronic component while leaving exposed the first surface of the first electronic component. The support member is then removed to expose the second surface of the first electronic component and the substrate surface of the substrate.

An integrated structure of a MEMS microphone and an air pressure sensor, and a fabrication method for the integrated structure, the structure including a base substrate; a vibrating membrane, back electrode, upper electrode, and lower electrode formed on the base substrate, as well as a sacrificial layer formed between the vibrating membrane and the back electrode and between the upper electrode and the lower electrode; a first integrated circuit electrically connected to the vibrating membrane and the back electrode respectively; and a second integrated circuit electrically connected to the lower electrode and the upper electrode respectively, wherein a region of the base substrate corresponding to the vibrating membrane is provided with a back cavity; the sacrificial layer between the vibrating membrane and the back electrode is hollowed out to from a vibrating space that communicates with the exterior of the integrated structure, and the sacrificial layer between the upper electrode and the lower electrode is hollowed out to form a closed space; and the integrated circuits are formed on a chip, thereby reducing the interference of connection lines on the performance of a microphone, reducing the introduction of noise, reducing the size of a product and reducing power consumption.

Various embodiments of the present disclosure are directed towards a microelectromechanical systems (MEMS) structure including an epitaxial layer overlying a MEMS substrate. The MEMS substrate comprises a moveable element arranged over a carrier substrate. The epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts overlies the epitaxial layer. A first subset of the plurality of contacts overlies the moveable element. The plurality of contacts respectively has an ohmic contact with the epitaxial layer.

A ultrasonic transducer device includes a transducer bottom electrode layer disposed over a substrate, and a plurality of vias that electrically connect the bottom electrode layer with the substrate, wherein substantially an entirety of the plurality of vias are disposed directly below a footprint of a transducer cavity. Alternatively, the transducer bottom electrode layer includes a first metal layer in contact with the plurality of vias and a second metal layer formed on the first metal layer, the first metal layer including a same material as the plurality of vias.

A described example includes: a MEMS component on a device side surface of a first semiconductor substrate; a second semiconductor substrate bonded to the device side surface of the first semiconductor substrate by a first seal patterned to form sidewalls that surround the MEMS component; a third semiconductor substrate having a second seal extending from a surface and bonded to the backside surface of the first semiconductor substrate by the second seal, the second seal forming sidewalls of a gap beneath the MEMS component. A trench extends through the first semiconductor substrate and at least partially surrounds the MEMS component. The third semiconductor substrate is mounted on a package substrate. A bond wire or ribbon bond couples the bond pad to a conductive lead on the package substrate; and mold compound covers the MEMS component, the bond wire, and a portion of the package substrate.