A dielectric composition that contains a first complex oxide represented by (Bi.sub.xNa.sub.1−x)TiO.sub.3—CaTiO.sub.3 and having a perovskite structure as a main component; and at least one second complex oxide having a perovskite structure selected from the group consisting of BaZrO.sub.3, SrZrO.sub.3, CaZrO.sub.3, NaNbO.sub.3, and NaTaO.sub.3 as an auxiliary component. A tolerance factor t when the at least one second complex oxide is BaZrO.sub.3, NaNbO.sub.3, or NaTaO.sub.3 is 0.9016≤t≤0.9035, a tolerance factor t when the at least one second complex oxide is SrZrO.sub.3 is 0.9005≤t≤0.9025, and a tolerance factor t when the at least one second complex oxide is CaZrO.sub.3 is 0.9000 t<0.9020.

A ceramic electronic device includes a dielectric layer and an internal electrode layer that are alternately stacked, wherein the dielectric layer contains yttria-stabilized zirconia and (Ca.sub.x1Ba.sub.x2Sr.sub.1-x1-x2)(Ti.sub.yZr.sub.1-y)O.sub.3 (0.6≤x1≤0.9, 0≤x2≤0.1, 0≤y≤0.1) as a main component, and wherein, in the dielectric layer, a concentration of the yttria-stabilized zirconia when a total amount of Ti and Zr is 100 mol % is 0.5 mol % or more and 5.0 mol % or less.

A multilayer ceramic capacitor (10) has a laminate body (20) constituted by dielectric layers (17) and internal electrode layers (18) stacked alternately. The dielectric layers (17) contain (Ba.sub.(1-x-y)Ca.sub.xSr.sub.y).sub.m(Ti.sub.(1-z)Zr.sub.z)O.sub.3, where 0.03≤x≤0.16, 0≤y≤0.02, 0<z≤0.02, 0.99≤m≤1.02, as a primary component, and an R oxide (R is a rare earth element) by 1.0 to 4.0 mol in equivalent element, an Mg compound by 0.2 to 2.5 mol in equivalent element, an Mn compound by 0.1 to 1.0 mol in equivalent element, a Zr compound by 0.1 to 2.0 mol in equivalent element, a V compound by 0.05 to 0.3 mol in equivalent element, and an Si compound by 0.2 to 5.0 mol in equivalent element, per 100 mol of the primary component. The multilayer ceramic capacitor can offer excellent DC bias properties and ensure high reliability.

A method for manufacturing an electrostatic chuck with multiple chucking electrodes made of ceramic pieces using metallic aluminum as the joining. The aluminum may be placed between two pieces and the assembly may be heated in the range of 770 C to 1200 C. The joining atmosphere may be non-oxygenated. After joining the exclusions in the electrode pattern may be machined by also machining through one of the plate layers. The machined exclusion slots may then be filled with epoxy or other material. An electrostatic chuck or other structure manufactured according to such methods.

A ceramic substrate according to the present invention includes: a ceramic base material; an electrode pattern formed on the ceramic base material; and at least one spacer arranged in any one of regions in the ceramic base material and the electrode pattern, in which a semiconductor chip is mounted.

A capacitor body includes a plurality of dielectric layers and a plurality of internal electrode layers stacked alternately. The plurality of dielectric layers include crystal grains of barium titanate, a rare earth element, and silicon. The crystal grains include a first crystal grain and a second crystal grain. The crystal grains each include a surface layer as a shell and an interior portion surrounded by the shell as a core. The first crystal grain has a higher concentration distribution of the rare earth element in the shell than in the core. The second crystal grain has distribution in which a ratio of a concentration of the silicon in the core and the shell is lower than a ratio of a concentration of the rare earth element in the core and the shell in the first crystal grain.

A ceramic electronic component includes a multilayer chip having a substantially rectangular parallelepiped shape and including a first multilayer structure and a second multilayer structure disposed on each of top and bottom faces of the first multilayer structure, the first multilayer structure including first ceramic dielectric layers having a first width in a first direction in which side faces of the multilayer chip are opposite to each other, the second multilayer structure including second internal electrode layers having a second width less than the first width in the first direction, and a pair of external electrodes formed from the respective two edge faces to at least one of side faces of the multilayer chip, wherein main components of the first and second internal electrode layers differ from a main component of the external electrodes.

Disclosed is a method for manufacturing a ceramic susceptor, the method including: preparing ceramic sheets; preparing a lamination structure of a molded body, in which the ceramic sheets are laminated and a conductive metal layer for electrodes is disposed between the ceramic sheet laminated products; and sintering the lamination structure of the molded body, wherein the preparing of the ceramic sheets includes: obtaining a vitrified first additive powder by heat-treating a slurry containing MgO, SiO.sub.2, and CaO; preparing a slurry by mixing an Al.sub.2O.sub.3 powder with the first additive powder, a second additive powder containing a MgO powder, and a third additive powder containing a Y.sub.2O.sub.3 powder; and forming the ceramic sheets by tape casting the slurry.

A multilayer coil component that includes a multilayer body in which a plurality of insulating layers are stacked in a stacking direction and a coil inside the multilayer body, and outer electrodes that are on surfaces of the multilayer body and are electrically connected to the coil. The insulating layers include a spinel-structure ferrite phase and a ZnFe(BO.sub.3)O-type crystalline phase.

A multilayer electronic component includes a body including a dielectric layer and an internal electrode; and an external electrode disposed on the body and connected to the internal electrode, wherein the dielectric layer includes first and second grains, wherein the first grain has a core-shell structure including a shell having an atomic ratio of 2*Sn/(Ba+Ti+Sn) or 2*Hf/(Ba+Ti+Hf) to be 1.0% or more and 5.0% or less, and a core having an atomic ratio of 2*Sn/(Ba+Ti+Sn) and 2*Hf/(Ba+Ti+Hf) to be less than 1.0%, and the second grain has an atomic ratio of 2*Sn/(Ba+Ti+Sn) and 2*Hf/(Ba+Ti+Hf) to be less than 1.0%, and wherein an area occupied by the first grain in an entire area of the first and second grains is 28.3-82.3%.