C30B23/04

Fabrication process using vapour deposition through a positioned shadow mask

A method of fabrication in a vacuum chamber. The method comprises: deploying the wafer within the vacuum chamber; applying a mask in a first position over the wafer in the vacuum chamber; following this, performing a first fabrication step comprising projecting material onto the wafer through the mask while in vacuum in the vacuum chamber; then operating a mask-handling mechanism deployed within the vacuum chamber in order to reposition the mask to a second position while remaining in vacuum in the vacuum chamber, wherein the repositioning comprises receiving readings from one or more sensors sensing a current position of the mask and based thereon aligning the current position of the mask to the second position; and following this repositioning, performing a second fabrication step comprising projecting material onto the wafer through patterned openings in the repositioned mask while still maintaining the vacuum in the vacuum chamber.

METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, AND METHOD FOR SUPPRESSING INTRODUCTION OF DISPLACEMENT TO GROWTH LAYER
20230160100 · 2023-05-25 ·

The problem to be solved by the present invention is to provide novel technology capable of suppressing the introduction of displacement to a growth layer. The present invention, which solves the abovementioned problem, pertains to a method for manufacturing a semiconductor substrate, the method including: a processing step for removing a portion of a base substrate and forming a pattern that includes a minor angle; and a crystal growth step for forming a growth layer on the base substrate where the patter has been formed. In addition, the present invention pertains to a method for suppressing the introduction of displacement to a growth layer, the method including a processing step for removing a portion of the base substrate and forming a pattern that includes a minor angle prior to forming the growth layer on the base substrate.

METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR SUBSTRATE, AND METHOD FOR SUPPRESSING INTRODUCTION OF DISPLACEMENT TO GROWTH LAYER
20230160100 · 2023-05-25 ·

The problem to be solved by the present invention is to provide novel technology capable of suppressing the introduction of displacement to a growth layer. The present invention, which solves the abovementioned problem, pertains to a method for manufacturing a semiconductor substrate, the method including: a processing step for removing a portion of a base substrate and forming a pattern that includes a minor angle; and a crystal growth step for forming a growth layer on the base substrate where the patter has been formed. In addition, the present invention pertains to a method for suppressing the introduction of displacement to a growth layer, the method including a processing step for removing a portion of the base substrate and forming a pattern that includes a minor angle prior to forming the growth layer on the base substrate.

METHOD FOR MANUFACTURING EPITAXIAL FILM AND EPITAXIAL FILM THEREOF

The present invention provides a method for manufacturing an epitaxial film and the epitaxial film thereof. The method comprises the steps of: providing a first single crystal substrate and forming a sacrificial layer and a first epitaxial film on the first single crystal substrate; removing the sacrificial layer in order to separate the first epitaxial film from the first single crystal substrate; shifting the first epitaxial film to a second single crystal substrate so as to let the first epitaxial film cover on a partial surface of the second single crystal substrate, wherein the first epitaxial film and the second single crystal substrate are two different crystallographic plane orientations in absolute coordinates; and forming a second epitaxial film on the first epitaxial film and the second single crystal substrate, so as to let the second epitaxial film has at least two crystallographic plane orientations.

Monochromatic emitters on coalesced selective area growth nanocolumns
11799054 · 2023-10-24 ·

A light emitting structure has quantum wells grown on a coalesced substrate stemming from nanocolumns. The crystal structure is very low in defects and efficiency of light production is good. By growing the nanocolumns at a lower temperature, the quantum well structure is better matched to the coalesced substrate and efficiency is improved.

Monochromatic emitters on coalesced selective area growth nanocolumns
11799054 · 2023-10-24 ·

A light emitting structure has quantum wells grown on a coalesced substrate stemming from nanocolumns. The crystal structure is very low in defects and efficiency of light production is good. By growing the nanocolumns at a lower temperature, the quantum well structure is better matched to the coalesced substrate and efficiency is improved.

SEMICONDUCTOR WAFER AND METHOD FOR MANUFACTURING SAME

A method for manufacturing a semiconductor wafer according to the invention of the present application includes a first step of forming a gallium nitride growth layer which is divided into a plurality of small sections, on an upper surface of a silicon substrate and a second step of filling portions between the plurality of small sections with an insulating film, wherein the insulating film exerts stress to the silicon substrate in a direction opposite to a direction in which the gallium nitride growth layer exerts stress on the silicon substrate.

SEMICONDUCTOR WAFER AND METHOD FOR MANUFACTURING SAME

A method for manufacturing a semiconductor wafer according to the invention of the present application includes a first step of forming a gallium nitride growth layer which is divided into a plurality of small sections, on an upper surface of a silicon substrate and a second step of filling portions between the plurality of small sections with an insulating film, wherein the insulating film exerts stress to the silicon substrate in a direction opposite to a direction in which the gallium nitride growth layer exerts stress on the silicon substrate.

Metaconductor skins for low loss RF conductors

Various examples related to metaconductor based skins and transmission lines are provided. In one example, a flexible metaconductor skin includes a flexible substrate; at least one layer of non-ferromagnetic metal disposed on the flexible substrate; and a layer of ferromagnetic metal disposed on the at least one layer of non-ferromagnetic metal. The flexible metaconductor skin can be used as a multi-layer coplanar waveguide (CPW) transmission line.

Metaconductor skins for low loss RF conductors

Various examples related to metaconductor based skins and transmission lines are provided. In one example, a flexible metaconductor skin includes a flexible substrate; at least one layer of non-ferromagnetic metal disposed on the flexible substrate; and a layer of ferromagnetic metal disposed on the at least one layer of non-ferromagnetic metal. The flexible metaconductor skin can be used as a multi-layer coplanar waveguide (CPW) transmission line.