Patent classifications
C30B23/04
MANUFACTURE OF GROUP IIIA-NITRIDE LAYERS ON SEMICONDUCTOR ON INSULATOR STRUCTURES
A method is provided for forming Group IIIA-nitride layers, such as GaN, on substrates. The Group IIIA-nitride layers may be deposited on mesa-patterned semiconductor-on-insulator (SOI, e.g., silicon-on-insulator) substrates. The Group IIIA-nitride layers may be deposited by heteroepitaxial deposition on mesa-patterned semiconductor-on-insulator (SOI, e.g., silicon-on-insulator) substrates.
METHOD OF FORMING SHADOW WALLS FOR FABRICATING PATTERNED STRUCTURES
A method comprising: forming a first mask over a substrate; forming one or more shadow walls in the openings of the first mask by selective area growth; forming a second mask over the substrate and shadow walls; forming a second material in the openings of the second mask by selective area growth; and depositing a layer of deposition material by angled deposition over parts of the substrate, shadow walls and second material, whereby regions shadowed by the shadow walls are left uncoated. In embodiments the second material may be a semiconductor and the deposition material may be a superconductor, and the method may be used to form one or more semiconductor-superconductor nanowires for inducing majorana zero modes as part of a quantum computing device.
METHOD OF FORMING SHADOW WALLS FOR FABRICATING PATTERNED STRUCTURES
A method comprising: forming a first mask over a substrate; forming one or more shadow walls in the openings of the first mask by selective area growth; forming a second mask over the substrate and shadow walls; forming a second material in the openings of the second mask by selective area growth; and depositing a layer of deposition material by angled deposition over parts of the substrate, shadow walls and second material, whereby regions shadowed by the shadow walls are left uncoated. In embodiments the second material may be a semiconductor and the deposition material may be a superconductor, and the method may be used to form one or more semiconductor-superconductor nanowires for inducing majorana zero modes as part of a quantum computing device.
Thin film laminate, thin film device and multilayer substrate
A thin film laminate comprises a metal layer consisting of a metal, and a thin film laminated on the surface of the metal layer, wherein a first direction is defined as one direction parallel to the surface of the metal layer, and a second direction is defined as one direction parallel to the surface of the metal layer and crossing the first direction; and the metal layer contains a plurality of first metal grains consisting of the metal and extending in the first direction on the surface of the metal layer, and a plurality of second metal grains consisting of the metal and extending in the second direction on the surface of the metal layer.
EPITAXIAL GALLIUM NITRIDE ALLOY FERROELECTRONICS
A method of fabricating a heterostructure includes providing a substrate, and implementing a non-sputtered, epitaxial growth procedure at a growth temperature to form a wurtzite structure supported by the substrate. The wurtzite structure includes an alloy of gallium nitride. The non-sputtered, epitaxial growth procedure is configured to incorporate a group IIIB element into the alloy. The wurtzite structure exhibits a breakdown field strength greater than a ferroelectric coercive field strength of the wurtzite structure.
MULTI-REGIONAL EPITAXIAL GROWTH AND RELATED SYSTEMS AND ARTICLES
Epitaxial growth of materials, and related systems and articles, are generally described.
MULTI-REGIONAL EPITAXIAL GROWTH AND RELATED SYSTEMS AND ARTICLES
Epitaxial growth of materials, and related systems and articles, are generally described.
EPITAXIAL FILM WITH MULTIPLE STRESS STATES AND METHOD THEREOF
A method for manufacturing epitaxial films with multiple stress states, comprising steps of: providing a first single crystal substrate, and forming a sacrificial layer and a first epitaxial film on the first single crystal substrate, wherein the first epitaxial film is made of a first material;
removing the sacrificial layer to separate the first epitaxial film from the first single crystal substrate; transferring the first epitaxial film to a second single crystal substrate, wherein the second single crystal substrate is made of a second material, a partial surface of the second single crystal substrate being overlapped by the first epitaxial film; applying epitaxies onto the first epitaxial film and the second single crystal substrate to form a second epitaxial film on the first epitaxial film and the second single crystal substrate.
EPITAXIAL FILM WITH MULTIPLE STRESS STATES AND METHOD THEREOF
A method for manufacturing epitaxial films with multiple stress states, comprising steps of: providing a first single crystal substrate, and forming a sacrificial layer and a first epitaxial film on the first single crystal substrate, wherein the first epitaxial film is made of a first material;
removing the sacrificial layer to separate the first epitaxial film from the first single crystal substrate; transferring the first epitaxial film to a second single crystal substrate, wherein the second single crystal substrate is made of a second material, a partial surface of the second single crystal substrate being overlapped by the first epitaxial film; applying epitaxies onto the first epitaxial film and the second single crystal substrate to form a second epitaxial film on the first epitaxial film and the second single crystal substrate.
Fabrication process using vapour deposition through a positioned shadow mask
A method of fabrication in a vacuum chamber. The method comprises: deploying the wafer within the vacuum chamber; applying a mask in a first position over the wafer in the vacuum chamber; following this, performing a first fabrication step comprising projecting material onto the wafer through the mask while in vacuum in the vacuum chamber; then operating a mask-handling mechanism deployed within the vacuum chamber in order to reposition the mask to a second position while remaining in vacuum in the vacuum chamber, wherein the repositioning comprises receiving readings from one or more sensors sensing a current position of the mask and based thereon aligning the current position of the mask to the second position; and following this repositioning, performing a second fabrication step comprising projecting material onto the wafer through patterned openings in the repositioned mask while still maintaining the vacuum in the vacuum chamber.