In some examples, a method for manufacturing a solid state device comprises forming a first layer of the solid state device; forming a conductive layer of the solid state device above the first layer, the conductive layer having an access pad formed on an end of the conductive layer; applying a voltage to the conductive layer using the access pad, the voltage forming an electric field in an area of the first layer beneath the conductive layer; and completing manufacture of the solid state device after applying the voltage.

In a manufacturing step in which a structure of target of screening is formed on a semiconductor substrate in the middle of manufacturing process before a semiconductor device is finished, screening of potential defects of a gate insulating film is performed for each wafer at one time so that the semiconductor device is caused to appear as an initial defective product when the finished semiconductor device is subjected to an electrical characteristic test. Provided are a semiconductor device, and a method of manufacturing a semiconductor device which enables reliable screening of potential defects in a short period of time.

In a manufacturing step in which a structure of target of screening is formed on a semiconductor substrate in the middle of manufacturing process before a semiconductor device is finished, screening of potential defects of a gate insulating film is performed for each wafer at one time so that the semiconductor device is caused to appear as an initial defective product when the finished semiconductor device is subjected to an electrical characteristic test. Provided are a semiconductor device, and a method of manufacturing a semiconductor device which enables reliable screening of potential defects in a short period of time.

A socket includes a first housing and a second housing each including a housing recessed portion capable of housing and holding a contact provided at its first end with a first contact portion and at its second end with a second contact portion while the first and second contact portions each are exposed, and a positioning member which positions the first and second housings independently of each other such that the housing recessed portion of the first housing and the housing recessed portion of the second of housing are disposed adjacent to each other to be paired.

In a manufacturing step in which a structure of target of screening is formed on a semiconductor substrate in the middle of manufacturing process before a semiconductor device is finished, screening of potential defects of a gate insulating film is performed for each wafer at one time so that the semiconductor device is caused to appear as an initial defective product when the finished semiconductor device is subjected to an electrical characteristic test. Provided are a semiconductor device, and a method of manufacturing a semiconductor device which enables reliable screening of potential defects in a short period of time.

In a manufacturing step in which a structure of target of screening is formed on a semiconductor substrate in the middle of manufacturing process before a semiconductor device is finished, screening of potential defects of a gate insulating film is performed for each wafer at one time so that the semiconductor device is caused to appear as an initial defective product when the finished semiconductor device is subjected to an electrical characteristic test. Provided are a semiconductor device, and a method of manufacturing a semiconductor device which enables reliable screening of potential defects in a short period of time.

An example method includes stressing, under different circuit-stress test conditions, a plurality of different types of regional circuits susceptible to time dependent dielectric breakdown (TDDB), and in response, monitoring for levels of reliability failure associated with the plurality of different types of regional circuits. The method includes storing a set of stress-test data based on each of the levels of reliability failure, the set of stress-test data being stored within the integrated circuit to indicate reliability-threshold test data specific to the integrated circuit. Within the integrated circuit, an on-chip monitoring circuit indicates operational conditions of suspect reliability associated with dielectric breakdown of at least one of the plurality of different types of regional circuits. And, the method further includes, during operation of the integrated circuit, adjusting at least one of the different circuit-stress test conditions based on the indicated operational conditions of suspect reliability.

An example method includes stressing, under different circuit-stress test conditions, a plurality of different types of regional circuits susceptible to time dependent dielectric breakdown (TDDB), and in response, monitoring for levels of reliability failure associated with the plurality of different types of regional circuits. The method includes storing a set of stress-test data based on each of the levels of reliability failure, the set of stress-test data being stored within the integrated circuit to indicate reliability-threshold test data specific to the integrated circuit. Within the integrated circuit, an on-chip monitoring circuit indicates operational conditions of suspect reliability associated with dielectric breakdown of at least one of the plurality of different types of regional circuits. And, the method further includes, during operation of the integrated circuit, adjusting at least one of the different circuit-stress test conditions based on the indicated operational conditions of suspect reliability.

In some examples, a method for manufacturing a solid state device comprises forming a first layer of the solid state device; forming a conductive layer of the solid state device above the first layer, the conductive layer having an access pad formed on an end of the conductive layer; applying a voltage to the conductive layer using the access pad, the voltage forming an electric field in an area of the first layer beneath the conductive layer; and completing manufacture of the solid state device after applying the voltage.

In some examples, a method for manufacturing a solid state device comprises forming a first layer of the solid state device; forming a conductive layer of the solid state device above the first layer, the conductive layer having an access pad formed on an end of the conductive layer; applying a voltage to the conductive layer using the access pad, the voltage forming an electric field in an area of the first layer beneath the conductive layer; and completing manufacture of the solid state device after applying the voltage.