G01R31/3167

ELECTRONIC CIRCUIT HAVING A DIGITAL TO ANALOG CONVERTER
20220329252 · 2022-10-13 ·

An electronic circuit includes first and second channels which respectively receive first and second analog signals. The first channel includes a first digital to analog converter having an output coupled to a first input of a first sign comparator, and the second channel includes a second digital to analog converter. A switch network selectively couples, upon reception of a self-test mode signal signaling a test phase, an output of the second digital to analog converter to a second input of the first sign comparator. A ramp generation circuit supplies to the first digital to analog converter and the second digital to analog converter two identical ramps of digital codes, which are shifted by a programmable offset with respect to one another. A checking circuit issues a test status signal based on the output of the first sign comparator.

Built-in self-test circuit and temperature measurement circuit including the same

A temperature measurement circuit includes a band-gap reference circuit configured to generate a band-gap reference voltage that is fixed regardless of an operation temperature, a reference voltage generator circuit configured to generate a measurement reference voltage by adjusting the band-gap reference voltage, a sensing circuit configured to generate a temperature-variant voltage based on a bias current, where the temperature-variant voltage is varied depending on the operation temperature, an analog-digital converter circuit configured to generate a first digital code indicating the operation temperature based on the measurement reference voltage and the temperature-variant voltage, and an analog built-in self-test (BIST) circuit configured to generate a plurality of flag signals indicating whether each of the band-gap reference voltage, the measurement reference voltage, and a bias voltage corresponding to the bias current is included in a predetermined range.

Built-in self-test circuit and temperature measurement circuit including the same

A temperature measurement circuit includes a band-gap reference circuit configured to generate a band-gap reference voltage that is fixed regardless of an operation temperature, a reference voltage generator circuit configured to generate a measurement reference voltage by adjusting the band-gap reference voltage, a sensing circuit configured to generate a temperature-variant voltage based on a bias current, where the temperature-variant voltage is varied depending on the operation temperature, an analog-digital converter circuit configured to generate a first digital code indicating the operation temperature based on the measurement reference voltage and the temperature-variant voltage, and an analog built-in self-test (BIST) circuit configured to generate a plurality of flag signals indicating whether each of the band-gap reference voltage, the measurement reference voltage, and a bias voltage corresponding to the bias current is included in a predetermined range.

ADVANCED DISCRETE CONTROL DEVICE DIAGNOSTIC ON DIGITAL OUTPUT MODULES

An apparatus performs methods for device diagnostics based on signals from digital outputs. The apparatus includes an input/output module with a digital output module to be coupled to a device. The input/output module measures one or more characteristics of a digital signal provided by the digital output module, where at least one of the one or more characteristics of the digital signal is associated with an output current of the digital output module. The input/output module also performs one or more diagnostics using the one or more measured characteristics of the digital signal.

SIMULATION METHOD FOR MIXED-SIGNAL CIRCUIT SYSTEM AND RELATED ELECTRONIC DEVICE

A simulation method for a mixed-signal circuit system includes: detecting a plurality of registers and a clock signal included in the mixed-signal circuit system; performing a timing analysis converting operation upon a circuit block coupled between any two register of the plurality of registers to obtain a converted circuit system; and performing a Static Timing Analysis operation upon the converted circuit system; wherein when the circuit block is convertible into a combinational circuit block, the timing analysis converting operation includes: converting the circuit block to the combinational circuit block, wherein the combinational circuit block is logic gate-level.

SIMULATION METHOD FOR MIXED-SIGNAL CIRCUIT SYSTEM AND RELATED ELECTRONIC DEVICE

A simulation method for a mixed-signal circuit system includes: detecting a plurality of registers and a clock signal included in the mixed-signal circuit system; performing a timing analysis converting operation upon a circuit block coupled between any two register of the plurality of registers to obtain a converted circuit system; and performing a Static Timing Analysis operation upon the converted circuit system; wherein when the circuit block is convertible into a combinational circuit block, the timing analysis converting operation includes: converting the circuit block to the combinational circuit block, wherein the combinational circuit block is logic gate-level.

CHIP AND CHIP TEST METHOD

A chip and a chip test method are provided. The chip includes a receiver circuit and a test circuit. The receiver circuit includes a signal receiving unit and a signal bump. The signal bump is coupled to the signal receiving unit. The test circuit is coupled to a circuit node between the signal receiving unit and the signal bump. The test circuit includes a digital-to-analog converter, a first resistor, and a unit gain buffer. A first terminal of the first resistor is coupled to the circuit node. An output terminal of the unit gain buffer is coupled to a second terminal of the first resistor. A first input terminal of the unit gain buffer is coupled to an output terminal of the digital-to-analog converter. A second input terminal of the unit gain buffer is coupled to an output terminal of the unit gain buffer.

BATTERY SOH DETERMINATION CIRCUIT
20220057452 · 2022-02-24 ·

A status of one or more components of a battery monitor circuit can be evaluated, such as to validate operation of the monitor circuit. In an example, a battery monitor circuit can be evaluated by providing a first test signal to a battery voltage measurement circuit that is coupled to a battery. A first analog-to-digital converter (ADC) circuit can be configured to receive a first voltage signal from the battery voltage measurement circuit in response to the first test signal. A processor circuit can be configured to validate the first ADC circuit by evaluating a correspondence between the first test signal and the received first voltage signal. One or more other ADC circuits in the battery monitor circuit can be validated by cross-checking measurement results with information from the first ADC circuit.

BATTERY SOH DETERMINATION CIRCUIT
20220057452 · 2022-02-24 ·

A status of one or more components of a battery monitor circuit can be evaluated, such as to validate operation of the monitor circuit. In an example, a battery monitor circuit can be evaluated by providing a first test signal to a battery voltage measurement circuit that is coupled to a battery. A first analog-to-digital converter (ADC) circuit can be configured to receive a first voltage signal from the battery voltage measurement circuit in response to the first test signal. A processor circuit can be configured to validate the first ADC circuit by evaluating a correspondence between the first test signal and the received first voltage signal. One or more other ADC circuits in the battery monitor circuit can be validated by cross-checking measurement results with information from the first ADC circuit.

Automated waveform analysis using a parallel automated development system

A mixed signal testing system capable of testing differently configured units under test (UUT) includes a controller, a test station and an interface system that support multiple UUTs. The test station includes independent sets of channels configured to send signals to and receive signals from each UUT being tested and signal processing subsystems that direct stimulus signals to a respective set of channels and receive signals in response thereto. The signal processing subsystems enable simultaneous and independent directing of stimulus signals through the sets of channels to each UUT and reception of signals from each UUT in response to the stimulus signals. Received signals responsive to stimulus signals provided to a fully functional UUT (with and without induced faults) are used to assess presence or absence of faults in the UUT being tested which may be determined to include one or more faults or be fault-free, i.e., fully functional.