A reflective spatial light modulator includes an electro-optic crystal having an input surface to which input light is input and a rear surface opposing the input surface, a light input/output unit being disposed on the input surface of the electro-optic crystal and having a first electrode through which the input light is transmitted, a light reflection unit including a substrate including a plurality of second electrodes and an adhesive layer for fixing the substrate to the rear surface and being disposed on the rear surface of the electro-optic crystal, and a drive circuit applying an electric field between the first electrode and the plurality of second electrodes.

Provided is an electro-absorption modulator that includes a substrate, a mesa structure, a first conductivity type electrode, and a second conductivity type electrode. The first conductivity type electrode includes a mesa-top electrode, a pad electrode, and a lead-out wire electrode. The mesa structure has a light input end, to which light is to be input from outside, and a light output end, which is on a side of the mesa structure that is opposite of the light input end. A connection position between a center position in a short-side direction of the lead-out wire electrode and the mesa-top electrode is closer to the light output end side in a long-side direction of the mesa-top electrode. The connection position is a position that is less than 50% from the light output end side with respect to a length in the long-side direction of the mesa-top electrode.

Gallium nitride (GaN) integrated circuit technology with optical communication is described. In an example, an integrated circuit structure includes a layer or substrate having a first region and a second region, the layer or substrate including gallium and nitrogen. A GaN-based device is in or on the first region of the layer or substrate. A CMOS-based device is over the second region of the layer or substrate. An interconnect structure is over the GaN-based device and over the CMOS-based device, the interconnect structure including conductive interconnects and vias in a dielectric layer. A photonics waveguide is over the interconnect structure, the photonics waveguide including silicon, and the photonics waveguide bonded to the dielectric layer of the interconnect structure.

A semiconductor device includes a base substrate comprising a first region and a second region, a photonics device disposed in the first region, the photonics device comprising a first doped layer disposed on the base substrate, and a second doped layer disposed on the first doped layer so that at least a portion vertically overlaps the first doped layer, the second doped layer having a first vertical thickness, and a transistor disposed in the second region, the transistor comprising a semiconductor layer disposed on the base substrate and horizontally spaced apart from the first doped layer, and a gate electrode horizontally spaced apart from the second doped layer and disposed on the semiconductor layer, disposed at the same vertical level as that of the second doped layer, and having a second vertical thickness equal to the first vertical thickness.

A semiconductor device includes a base substrate comprising a first region and a second region, a photonics device disposed in the first region, the photonics device comprising a first doped layer disposed on the base substrate, and a second doped layer disposed on the first doped layer so that at least a portion vertically overlaps the first doped layer, the second doped layer having a first vertical thickness, and a transistor disposed in the second region, the transistor comprising a semiconductor layer disposed on the base substrate and horizontally spaced apart from the first doped layer, and a gate electrode horizontally spaced apart from the second doped layer and disposed on the semiconductor layer, disposed at the same vertical level as that of the second doped layer, and having a second vertical thickness equal to the first vertical thickness.

The present disclosure provides nanostructure compositions and methods of producing nanostructure compositions. The nanostructure compositions comprise at least one population of nanostructures, at least one reactive diluent, at least one anaerobic stabilizer, and optionally at least one organic resin. The present disclosure also provides nanostructure films comprising a nanostructure layer and methods of making nanostructure films.

The present disclosure provides nanostructure compositions and methods of producing nanostructure compositions. The nanostructure compositions comprise at least one population of nanostructures, at least one reactive diluent, at least one anaerobic stabilizer, and optionally at least one organic resin. The present disclosure also provides nanostructure films comprising a nanostructure layer and methods of making nanostructure films.

A silicon optical modulator is fabricated to have a multi-slab structure between the contacts and the waveguide, imparting desirable performance attributes. A first slab comprises dopant of a first level. A second slab adjacent to (e.g., on top of) the first slab, comprises a doped region proximate to a contact, and an intrinsic region proximate to the waveguide. The parallel resistance properties and low overlap between the highly doped silicon and optical mode pigtail afforded by the multi-slab configuration, allow the modulator to operate with reduced optical losses and at a high speed. Embodiments may be implemented in a Mach-Zehnder interferometer or in micro-ring resonator modulator configuration.

A core, constituted by an amorphous undoped semiconductor (i type), which is formed on a lower clad layer, and a p-type layer and an n-type layer which are disposed on the lower clad layer with the core interposed therebetween and are formed in contact with the core are provided. The core is formed to be thicker than the p-type layer and the n-type layer. The p-type layer and the n-type layer are constituted by single crystal silicon.

A core, constituted by an amorphous undoped semiconductor (i type), which is formed on a lower clad layer, and a p-type layer and an n-type layer which are disposed on the lower clad layer with the core interposed therebetween and are formed in contact with the core are provided. The core is formed to be thicker than the p-type layer and the n-type layer. The p-type layer and the n-type layer are constituted by single crystal silicon.