A sensor is provided and includes a first control line; a first signal line; a first auxiliary line; a first detection electrode; a first detection switch connected to the first detection electrode, the first control line and the first signal line; and a first shielding electrode connected to the first auxiliary line, wherein the first shielding electrode is located to overlap the first signal line via an insulating film.

The present disclosure relates to a display device. A display device according to an embodiment of the present inventive concept includes gate lines extending along a first direction, data lines extending along a second direction, pixels including pixel electrodes, each of the pixels including a transistor connected to a gate line and a data line, and a pixel electrode connected to the transistor, the pixels including a first pixel which includes a first pixel electrode connected to a first data line and is disposed in n.sup.th pixel row and m.sup.th pixel column, and a second pixel which includes a second pixel electrode connected to the first data line or a second data line disposed adjacent to the first data line and is disposed in (n+1).sup.th pixel row and the m.sup.th pixel column. The first data line does not overlap the first pixel electrode and overlaps the second pixel electrode.

The present disclosure relates to a circuit of controlling a common voltage of a liquid crystal panel. According to an embodiment of the present disclosure, a voltage control circuit is configured to provide a common voltage to a common electrode of a liquid crystal panel. The liquid crystal panel includes M rows and N columns of pixel units. Each pixel unit is coupled to the common electrode. The voltage control circuit includes an operational amplifier arranged in a negative feedback configuration. The operational amplifier includes: an input stage, a gain stage and an output stage. The output stage includes a second NMOS transistor and a second PMOS transistor. A gate of the second NMOS transistor receives a first control signal, a drain of the second NMOS transistor is coupled to a gate of a first PMOS transistor, and a source of the second NMOS transistor is coupled to a second reference voltage. A gate of the second PMOS transistor receives a second control signal, a drain of the second PMOS transistor is coupled to a gate of a first NMOS transistor, and a source of the second PMOS transistor is coupled to a third reference voltage.

An array substrate includes: a first substrate; a plurality of gate lines and a plurality of data lines; a plurality of thin film transistors; and a plurality of reflective electrodes. The plurality of gate lines and the plurality of data lines define a plurality of sub-pixel regions. A thin film transistor is located in a sub-pixel region. A reflective electrode is located in the sub-pixel region and electrically connected to the thin film transistor in the same sub-pixel region. Each reflective electrode has a border including a plurality of first sub-borders extending in a first direction, a plurality of second sub-borders extending in a second direction, and a plurality of chamfer borders each connecting a first sub-border and a second sub-border that are adjacent; and an intersection of extension lines of the first sub-border and the second sub-border is located outside the border of the reflective electrode.

According to one embodiment, a semiconductor substrate including, a switching element, a first organic insulating film, first and second metal lines arranged in a first direction and extending in a second direction, and a metal electrode located between the first and second metal lines. The first organic insulating film includes first and second surfaces. The switching element is covered with the first surface. The first and second metal lines and the metal electrode are located on the second surface side. The first metal line includes a first portion extending in the second direction and a second portion having a width larger than a width of the first portion. The second portion includes arcuate first and second edge. The metal electrode has a polygonal shape having n corners or an elliptic shape where n is larger than four.

It is an object of the present invention to form a pixel electrode and a metal film using one resist mask in manufacturing a stacked structure by forming the metal film over the pixel electrode. A conductive film to be a pixel electrode and a metal film are stacked. A resist pattern having a thick region and a region thinner than the thick region is formed over the metal film using an exposure mask having a semi light-transmitting portion. The pixel electrode, and the metal film formed over part of the pixel electrode to be in contact therewith are formed using the resist pattern. Accordingly, a pixel electrode and a metal film can be formed using one resist mask.

A liquid crystal display includes a pixel electrode including a first subpixel electrode and a second subpixel electrode spaced apart with a gap therebetween, a common electrode facing the pixel electrode, and a liquid crystal layer formed between the pixel electrode and the common electrode and including a plurality of liquid crystal molecules. The first and second subpixel electrodes include a plurality of branches, and each of the first and second subpixel electrodes includes a plurality of subregions. The branches extend in different directions in different subregions.

Disclosed are a spatial light modulator and a display device, where 2*2 adjacent pixel electrodes are a pixel group, through-holes corresponding to the respective pixel electrodes are located proximate to the center of the pixel group, and a photo spacer is located at the center of the pixel group, so that the photo spacer can overlap with the through-holes, or the photo spacer can be arranged in close proximity to the through-holes. If the photo spacer overlaps with the through-holes, then a black matrix layer covering the photo spacer, and a black matrix layer covering the surrounding of the photo spacer may cover at least a part of the through-holes; and if the photo spacer is arranged in close proximity to the through-holes, then the black matrix layer covering the surrounding of the photo spacer may cover at least a part of the through-holes.

The present invention provides a display panel and a manufacture method thereof. By locating the matrix electrode corresponding to the black matrix on one side of the color film substrate, which is close to the liquid crystal layer, and because the matrix electrode is coupled to the common electrode signal, no voltage difference exists between the matrix electrode and the common electrode, and no matter in condition of being electrified or not electrified, the liquid crystal layer between the matrix electrode and the common electrode of the array substrate is not orientated and constantly appears in an opaque state so that no interference generates to light between adjacent pixels of the panel to eliminate the large view angle color washout of the panel and to improve the display quality of the LTPS display panel.

A liquid crystal display includes a first insulation substrate, a gate line, a data line configured to cross the gate line while being insulated therefrom, a thin film transistor connected to the gate line and the data line, a pixel electrode configured to include a first subpixel electrode connected to the thin film transistor and a second subpixel electrode, a second insulation substrate configured to face the first insulation substrate, a common electrode disposed on the second insulation substrate, and a liquid crystal layer disposed between the first insulation substrate and the second insulation substrate to include a plurality of liquid crystal molecules, where each of the first subpixel electrode and the second subpixel electrode includes a unit pixel electrode including a plurality of minute branches that is extended from a horizontal stem and a vertical stem.