An array substrate, a display panel, and an electronic device are provided. The array substrate includes: a base substrate; a first electrode arranged on the base substrate; a gate line arranged on the base substrate, wherein the gate line is electrically insulated from the first electrode; a second electrode arranged on a side of the gate line away from the base substrate, wherein at least one first sub-pixel unit provided on the base substrate includes: a first connection portion arranged in a same layer as the second electrode and a second connection portion arranged in a same layer as the gate line, wherein the second connection portion is electrically connected to the first electrode, and an orthographic projection of the second connection portion on the base substrate at least partially overlaps an orthographic projection of the first connection portion on the base substrate.

A mask is provided that includes a first graphic region and a second graphic region disposed along a first direction. The first graphic region comprises a first splicing exposure region. The second graphic region comprises a second splicing exposure region. The first splicing exposure region is used for, after being translated along a first vector, forming a first splicing auxiliary region, and the first splicing auxiliary region coincides with the second splicing exposure region.

The preset disclosure provides an array substrate and a method for manufacturing the same, a display panel and a display device. The array substrate includes: a base substrate; data lines and pixel electrodes located on the base substrate, and a light shielding structure located on a side of the data lines close to the base substrate, orthographic projections of the gaps on the base substrate are located within an orthographic projection of the light shielding structure on the base substrate, and the light shielding structure includes a metal layer and a first transparent layer located on a side of the metal layer away from the base substrate.

A COA substrate manufacturing method including: forming a TFT on a base substrate; forming a second insulation layer on the TFT; forming a color resist layer on the second insulation layer; forming a third insulation layer on the color resist layer; forming a through hole which exposes the drain electrode of the TFT; forming an ITO film layer on the third insulation layer; forming a photoresist layer on the ITO film layer; performing a light-shielding process to the photoresist layer on the vias-region ITO film layer and an exposure process to the photoresist layer on the non vias-region ITO film layer; developing the photoresist layer on the vias-region ITO and the non vias-region ITO film layers to obtain a photoresist layer plug covered on the vias-region ITO film layer. The photoresist is provided to fill the through hole so as to improve the quality of a display device.

A thin film transistor array panel includes a substrate, a data line and a light blocking layer disposed on the substrate, a thin film transistor disposed on the light blocking layer and including a source electrode, a drain electrode, and an oxide semiconductor layer, and an insulating layer disposed on the substrate and including a first contact hole overlapping a portion of the data line, a second contact hole overlapping a portion of the source electrode, and a third contact hole overlapping a portion of the drain electrode, wherein the first contact hole, the second contact hole, and the third contact hole are arranged in a row in a first direction perpendicular to a direction in which the data line is extended.

An array substrate manufacturing method, an array substrate formed by the method, and a liquid crystal apparatus are disclosed. The method includes steps of depositing a first metal layer to form a plurality of scanning lines; depositing a first insulating layer and performing a patterning process on the first insulating layer; depositing a semiconductor layer and a second metal layer to form a plurality of data lines and thin-film transistors; depositing a second insulating layer to form a plurality of contact holes; and depositing a transparent layer to form a plurality of pixel electrodes.

A mask, a manufacturing method thereof, and a patterning method employing the mask. In the mask, a plurality of masks can be combined into one mask. The pattern area (01) of the mask is provided with a first pattern section (10) and a second pattern section (20) which are not overlapped with each other; light of a first wavelength can run through the first pattern section (10) but light of a second wavelength cannot run through the first pattern section; the light of the second wavelength can run thorough the second pattern section (20) but the light of the first wavelength cannot run through the second pattern section; and the light of the first wavelength and the light of the second wavelength can run through the non-pattern area, or any of the light of the first wavelength and the light of the second wavelength cannot run through the non-pattern area. The mask is obtained by combining a plurality of masks.

The present disclosure provides a mask assembly, a mask apparatus and a mask control method, pertaining to the field of mask technology. The mask assembly includes a mask plate and a controller. The mask plate includes a plurality of mask units. The mask unit has a light transmission state and a light interruption state. The controller is used to control the mask unit to switch between the light transmission state and the light interruption state to adjust a light transmission region of the mask plate. The present disclosure solves the problem that mask efficiency is low. The present disclosure is used to mask film layers.

The present disclosure provides an array substrate and a manufacturing method of the array substrate, a display device. An array substrate comprises: a pixel array, each pixel in the pixel array having a pixel electrode; a transistor array, each transistor in the transistor array having a source electrode; and a connection electrode for electrically connecting the pixel electrode to a corresponding source electrode.

Disclosed are an array substrate, a fabrication method thereof, a liquid crystal display panel and a display device. The array substrate includes a substrate, a wire grid polarization layer located in an open region in a pixel region of the substrate and a transparent pattern located at the side, away from the substrate, of the wire grid polarization layer and consistent with a pattern of the wire grid polarization layer.