A display device includes: a display area including a plurality of pixels; a first peripheral area disposed at one side of the display area; and a second peripheral area disposed at the opposite side of the display area, wherein a first column spacer is disposed in the display area, a second column spacer is disposed in the first peripheral area, and a third column spacer is disposed in the second peripheral area. The patterns of an exposure mask utilized in the first peripheral area in which the second column spacer is disposed and the second peripheral area in which the third column spacer is disposed may be different from each other.

A display device includes: a display area including a plurality of pixels; a first peripheral area disposed at one side of the display area; and a second peripheral area disposed at the opposite side of the display area, wherein a first column spacer is disposed in the display area, a second column spacer is disposed in the first peripheral area, and a third column spacer is disposed in the second peripheral area. The patterns of an exposure mask utilized in the first peripheral area in which the second column spacer is disposed and the second peripheral area in which the third column spacer is disposed may be different from each other.

In certain embodiments, a method for designing a semiconductor device includes generating a 2D design for fabricating chiplets on a substrate. The chiplets are component levels for a multi-chip integrated circuit. The 2D design includes a first layout for alignment features and semiconductor structures to be formed on a first surface of a first chiplet and a second layout for alignment features and semiconductor structures to be formed on a first surface of a second chiplet. The first and second chiplets are adjacent on the substrate. The second layout is a mirror image of the first layout across a reference line shared by the first and second chiplets. The first surfaces of the first and second chiplets are both either top or bottom surfaces. The method further includes generating one or more photomasks according to the design.

In certain embodiments, a method for designing a semiconductor device includes generating a 2D design for fabricating chiplets on a substrate. The chiplets are component levels for a multi-chip integrated circuit. The 2D design includes a first layout for alignment features and semiconductor structures to be formed on a first surface of a first chiplet and a second layout for alignment features and semiconductor structures to be formed on a first surface of a second chiplet. The first and second chiplets are adjacent on the substrate. The second layout is a mirror image of the first layout across a reference line shared by the first and second chiplets. The first surfaces of the first and second chiplets are both either top or bottom surfaces. The method further includes generating one or more photomasks according to the design.

An exposure apparatus according to an embodiment is configured to implement an exposure process for exposing a substrate to light. The exposure apparatus includes a stage, a storage device, and a controller. The stage is configured to hold the substrate. The storage device is configured to store a plurality of correction maps each having an alignment correction value that differs from each other. The controller is configured to control in the exposure process an exposure position relative to the substrate by selecting a correction map from the correction maps based on measurement results of a plurality of alignment marks arranged on the substrate or an amount of warpage of the substrate and moving the stage based on the selected correction map.

An exposure apparatus according to an embodiment is configured to implement an exposure process for exposing a substrate to light. The exposure apparatus includes a stage, a storage device, and a controller. The stage is configured to hold the substrate. The storage device is configured to store a plurality of correction maps each having an alignment correction value that differs from each other. The controller is configured to control in the exposure process an exposure position relative to the substrate by selecting a correction map from the correction maps based on measurement results of a plurality of alignment marks arranged on the substrate or an amount of warpage of the substrate and moving the stage based on the selected correction map.

In accordance with some embodiments of the present disclosure, an inspection method of a photomask includes performing a first inspection process, unloading the photomask from the inspection system, and performing a second inspection process. In the first inspection process, a common Z calibration map of an objective lens of an optical module with respect to the photomask is generated and stored, and a first image of the photomask is captured by using an image sensor while focusing the objective lens of the optical module based on the common Z calibration map. The photomask is unloaded from the inspection system. In the second inspection process, the photomask is loaded on the inspection system and a second image of the photomask is captured by using an image sensor while focusing an objective lens of an optical module based on the common Z calibration map generated in the first inspection process.

In accordance with some embodiments of the present disclosure, an inspection method of a photomask includes performing a first inspection process, unloading the photomask from the inspection system, and performing a second inspection process. In the first inspection process, a common Z calibration map of an objective lens of an optical module with respect to the photomask is generated and stored, and a first image of the photomask is captured by using an image sensor while focusing the objective lens of the optical module based on the common Z calibration map. The photomask is unloaded from the inspection system. In the second inspection process, the photomask is loaded on the inspection system and a second image of the photomask is captured by using an image sensor while focusing an objective lens of an optical module based on the common Z calibration map generated in the first inspection process.

A method of forming patterned features on a substrate is provided. The method includes positioning a plurality of masks arranged in a mask layout over a substrate. The substrate is positioned in a first plane and the plurality of masks are positioned in a second plane, the plurality of masks in the mask layout have edges that each extend parallel to the first plane and parallel or perpendicular to an alignment feature on the substrate, the substrate includes a plurality of areas configured to be patterned by energy directed through the masks arranged in the mask layout. The method further includes directing energy towards the plurality of areas through the plurality of masks arranged in the mask layout over the substrate to form a plurality of patterned features in each of the plurality of areas.

The inventive concept provides a mask treating method. The mask treating method includes treating a mask by supplying a liquid to the mask, and irradiating a laser to a region of the mask on which a specific pattern is formed while the liquid remains on the mask; moving an optical module including a laser unit configured to irradiate the laser between a process position for treating the substrate and a standby position deviating from the process position; and adjusting a state of the optical module at an inspection port provided at the standby position to a set condition before the optical module is moved to the process position.