A method for manufacturing a semiconductor device includes: providing a semiconductor wafer, and acquiring surface flatness information of the semiconductor wafer; determining an exposure parameter of the semiconductor wafer according to the surface flatness information of the semiconductor wafer; and exposing the semiconductor wafer according to the exposure parameter.

A metrology target includes: a first structure arranged to be created by a first patterning process; and a second structure arranged to be created by a second patterning process, wherein the first structure and/or second structure is not used to create a functional aspect of a device pattern, and wherein the first and second structures together form one or more instances of a unit cell, the unit cell having geometric symmetry at a nominal physical configuration and wherein the unit cell has a feature that causes, at a different physical configuration than the nominal physical configuration due to a relative shift in pattern placement in the first patterning process, the second patterning process and/or another patterning process, an asymmetry in the unit cell.

An exposure apparatus according to an embodiment is configured to implement an exposure process for exposing a substrate to light. The exposure apparatus includes a stage, a storage device, and a controller. The stage is configured to hold the substrate. The storage device is configured to store a plurality of correction maps each having an alignment correction value that differs from each other. The controller is configured to control in the exposure process an exposure position relative to the substrate by selecting a correction map from the correction maps based on measurement results of a plurality of alignment marks arranged on the substrate or an amount of warpage of the substrate and moving the stage based on the selected correction map.

A metrology method relating to measurement of a structure on a substrate, the structure being subject to one or more asymmetric deviation. The method includes obtaining at least one intensity asymmetry value relating to the one or more asymmetric deviations, wherein the at least one intensity asymmetry value includes a metric related to a difference or imbalance between the respective intensities or amplitudes of at least two diffraction orders of radiation diffracted by the structure; determining at least one phase offset value corresponding to the one or more asymmetric deviations based on the at least one intensity asymmetry value; and determining one or more measurement corrections for the one or more asymmetric deviations from the at least one phase offset value.

Disclosed herein is a substrate stack comprising a plurality of substrates, wherein: each substrate in the substrate stack comprises at least one alignment opening set; the at least one alignment opening set in each substrate is aligned for a light beam to pass through corresponding alignment openings in each substrate; and each substrate comprises at least one alignment opening that has a smaller diameter than the corresponding alignment openings in the other substrates.

Disclosed is a method for modeling measurement data over a substrate area and associated apparatus. The method comprises obtaining measurement data relating to a first layout; modeling a second model based on said first layout; evaluating the second model on a second layout, the second layout being more dense than said first layout; and fitting a first model to this second model according to the second layout.

A substrate treatment apparatus includes a transport part to transport a transparent rectangular substrate, a substrate support part to support the substrate, light generators to irradiate two different lights onto the moving substrate, and sense the irradiated lights, and a controller to determine a posture of the substrate with reference to the sensed lights and control the transport part such that the substrate is seated on the substrate support part in a default posture that is preset. The controller determines the posture of the transparent rectangular substrate with respect to the default posture using a time difference between a time point at which a first light of the two different lights is not transmitted through an edge of the transparent rectangular substrate and a time point at which a second light of the two different lights is not transmitted through the edge of the transparent rectangular substrate.

An alignment mark includes a first alignment marker located on a first surface of a substrate and a second alignment marker located on a second surface of the substrate. The second alignment marker is arranged to be matched with the first alignment marker, and capable of representing a process variation between the second alignment marker and the first alignment marker.

The invention relates to a method for determining a registration error of a structure on a mask for semiconductor lithography, comprising the following method steps: generating an image of at least one region of the mask, determining at least one measuring contour in the image, and matching the forms of a design contour and a measuring contour to one another while at the same time matching the registration of the two contours.

In a method executed in an exposure apparatus, a focus control effective region and a focus control exclusion region are set based on an exposure map and a chip area layout within an exposure area. Focus-leveling data are measured over a wafer. A photo resist layer on the wafer is exposed with an exposure light. When a chip area of a plurality of chip areas of the exposure area is located within an effective region of a wafer, the chip area is included in the focus control effective region, and when a part of or all of a chip area of the plurality of chip areas is located on or outside a periphery of the effective region of the wafer, the chip area is included in the focus control exclusion region In the exposing, a focus-leveling is controlled by using the focus-leveling data measured at the focus control effective region.