The device for accurate measurement of time intervals comprises a first comparator (1) to the input of which a first signal (STA) is fed and the output of which is connected to the first of the inputs of the combiner (3), to the second input of which the output of a second comparator (2) is connected, to the input of which a second signal (STO) is fed. The output of the combiner (3) is connected to the input of an analogue filter (4), the output of which is connected to the input of an analogue-to-digital converter (5), the output of which is connected to the input of a control and signal processing circuit (6), to the second input of which a reference clock signal (REF) is further fed, which is simultaneously fed to another input of the analogue-to-digital converter (5) and the output of the control and signal processing circuit (6) is a data output (DAT) of time intervals.

The device for accurate measurement of time intervals comprises a first comparator (1) to the input of which a first signal (STA) is fed and the output of which is connected to the first of the inputs of the combiner (3), to the second input of which the output of a second comparator (2) is connected, to the input of which a second signal (STO) is fed. The output of the combiner (3) is connected to the input of an analogue filter (4), the output of which is connected to the input of an analogue-to-digital converter (5), the output of which is connected to the input of a control and signal processing circuit (6), to the second input of which a reference clock signal (REF) is further fed, which is simultaneously fed to another input of the analogue-to-digital converter (5) and the output of the control and signal processing circuit (6) is a data output (DAT) of time intervals.

A time measurement device measures a time interval between input timings of first and second pulsed target signals. The device includes: a processor; a number-of-periods detector that detects, by using a clock signal with a predetermined clock frequency and a predetermined clock period, the time interval in units of the clock period; and a phase detection unit including a band-pass filter. The band-pass filter receives at least one of the first and second target signals as a filtering target signal and extracts a signal component of the clock frequency from the filtering target signal. The phase detection unit detects a phase difference between the extracted signal and the clock signal. The processor derives, by using a result detected by the number-of-periods detector and the detected phase difference, the time interval at a resolution finer than the clock period.

A time measurement device measures a time interval between input timings of first and second pulsed target signals. The device includes: a processor; a number-of-periods detector that detects, by using a clock signal with a predetermined clock frequency and a predetermined clock period, the time interval in units of the clock period; and a phase detection unit including a band-pass filter. The band-pass filter receives at least one of the first and second target signals as a filtering target signal and extracts a signal component of the clock frequency from the filtering target signal. The phase detection unit detects a phase difference between the extracted signal and the clock signal. The processor derives, by using a result detected by the number-of-periods detector and the detected phase difference, the time interval at a resolution finer than the clock period.

A circuit includes a period calculator and a pulse width calculator. The period calculator is configured for receiving a first predetermined digital code and a second predetermined digital code, and for calculating a first calculated period value according to the first predetermined digital code, and calculating a second calculated period value according to the second predetermined digital code. The first predetermined digital code has a first predetermined period value, and the second predetermined digital code has a second predetermined period value. The pulse width calculator is configured for receiving a predetermined pulse width, and calculating a first pulse width code corresponding to the predetermined pulse width according to the first predetermined period value, the second predetermined period value, the first calculated period value, the second calculated period value and the predetermined pulse width.

A powertrain engine control method may include: acquiring period information based on tooth information of an engine crank target wheel by using a timer (T); subdividing the period information by a division rate value (R) by using a timer (D) so as to enable the timer (D) to operate R times; carrying out synchronization with the timer (D) and carrying out counting by using a timer (A) from a zero (0) to 720 degrees for a four-stroke engine operation cycle; and correcting, by using a timer (V), an angle counter which is not generated at the time of deceleration of a vehicle.

A powertrain engine control method may include: acquiring period information based on tooth information of an engine crank target wheel by using a timer (T); subdividing the period information by a division rate value (R) by using a timer (D) so as to enable the timer (D) to operate R times; carrying out synchronization with the timer (D) and carrying out counting by using a timer (A) from a zero (0) to 720 degrees for a four-stroke engine operation cycle; and correcting, by using a timer (V), an angle counter which is not generated at the time of deceleration of a vehicle.

A time capture circuit can measure time between edges of a logic input signal. A delay line generates consecutive increasingly delayed replicas of the logic input signal. A free running counter is clocked by a counter clock signal corresponding to an external clock signal multiplied by a clock scale factor. A counter value capture circuit captures the counter value upon occurrence of an edge in the input signal, outputs a captured counter value, and issues a trigger signal. A decoder determines a decoded value based on values of the input signal and of the plurality of consecutive increasingly replicas when the trigger signal is issued and computes a capture value as the difference of the captured counter value logical left shifted by a first scale factor and the decoded value logical right shifted by a second scale factor.

A time capture circuit can measure time between edges of a logic input signal. A delay line generates consecutive increasingly delayed replicas of the logic input signal. A free running counter is clocked by a counter clock signal corresponding to an external clock signal multiplied by a clock scale factor. A counter value capture circuit captures the counter value upon occurrence of an edge in the input signal, outputs a captured counter value, and issues a trigger signal. A decoder determines a decoded value based on values of the input signal and of the plurality of consecutive increasingly replicas when the trigger signal is issued and computes a capture value as the difference of the captured counter value logical left shifted by a first scale factor and the decoded value logical right shifted by a second scale factor.

A resistor-capacitor (RC) sensor circuit of an electronic device is driven to a drive voltage using a representative copy of a current that drives an electronic circuit line of the electronic device. The RC sensor circuit is to sample voltages that are indicative of an RC time constant of the electronic circuit line. A first sample voltage is determined by sampling a first representative voltage generated at the RC sensor circuit by driving the RC sensor circuit with the representative copy of the current over a first time period. A second sample voltage is determined by sampling a second representative voltage generated at the RC sensor circuit by driving the RC sensor circuit with the representative copy of the current over a second time period. A ratio of the first sample voltage and the second sample voltage is indicative of the RC time constant of the electronic circuit line.