The present invention relates to a method for automatic translation of ladder logic to a SMT-based model checker in a network comprising defining (10) the topology of the network as an enriched network topology based on packets exchanged in the network, extracting (20) a program from the packets relating to a PLC in the network and identifying inputs, outputs, variables and a ladder diagram of the PLC, translating (30) the inputs, outputs, variables and ladder diagram into a predefined formal model, wherein the predefined formal model is a circuit-like SMT-based model checker, and wherein the translating (30) comprises translating the set of data types of the program according to a predefined model set of data types of the circuit-like SMT-based model checker, translating the inputs of the PLC as model inputs of the circuit-like SMT-based model checker of the same type, translating the outputs of the PLC as model output latches of the circuit-like SMT-based model checker of the same type, translating the variables of the PLC as model variable latches of the circuit-like SMT-based model checker of the same type, translating comparators and arithmetic operators of the ladder diagram into a plurality of predefined model functions of the circuit-like SMT-based model checker, translating contacts and coils of the ladder diagram according to predefined model recursive procedures relating to the predefined model set of data types, the model inputs, the model output latches, the model variable latches and the plurality of predefined model functions, wherein the contacts are switches that can block or allow the flow of the current in a connection and each of the contacts is controlled by a Boolean input or variable, and wherein the coils are assignments to Boolean variables.

The present invention relates to a method for automatic translation of ladder logic to a SMT-based model checker in a network comprising defining (10) the topology of the network as an enriched network topology based on packets exchanged in the network, extracting (20) a program from the packets relating to a PLC in the network and identifying inputs, outputs, variables and a ladder diagram of the PLC, translating (30) the inputs, outputs, variables and ladder diagram into a predefined formal model, wherein the predefined formal model is a circuit-like SMT-based model checker, and wherein the translating (30) comprises translating the set of data types of the program according to a predefined model set of data types of the circuit-like SMT-based model checker, translating the inputs of the PLC as model inputs of the circuit-like SMT-based model checker of the same type, translating the outputs of the PLC as model output latches of the circuit-like SMT-based model checker of the same type, translating the variables of the PLC as model variable latches of the circuit-like SMT-based model checker of the same type, translating comparators and arithmetic operators of the ladder diagram into a plurality of predefined model functions of the circuit-like SMT-based model checker, translating contacts and coils of the ladder diagram according to predefined model recursive procedures relating to the predefined model set of data types, the model inputs, the model output latches, the model variable latches and the plurality of predefined model functions, wherein the contacts are switches that can block or allow the flow of the current in a connection and each of the contacts is controlled by a Boolean input or variable, and wherein the coils are assignments to Boolean variables.

The present disclosure relates to an apparatus for recognizing a pulse signal, and more particularly, to an apparatus for recognizing a pulse signal, which maintains the pulse signal being input for a scan time until an end time point of the scan time, and stores the pulse signal in a pulse signal storage area as pulse input data. The apparatus for recognizing a pulse signal according to one embodiment of the present disclosure includes a signal maintaining unit configured to maintain and output the pulse signal, which is input for the scan time, as a pulse maintaining signal; a signal transmission unit configured to receive the pulse maintaining signal from the signal maintaining unit and transmit the input pulse maintaining signal; and a control unit configured to output the transmission control signal to the signal transmission unit to receive and store the received pulse maintaining signal.

The present disclosure relates to an apparatus for recognizing a pulse signal, and more particularly, to an apparatus for recognizing a pulse signal, which maintains the pulse signal being input for a scan time until an end time point of the scan time, and stores the pulse signal in a pulse signal storage area as pulse input data. The apparatus for recognizing a pulse signal according to one embodiment of the present disclosure includes a signal maintaining unit configured to maintain and output the pulse signal, which is input for the scan time, as a pulse maintaining signal; a signal transmission unit configured to receive the pulse maintaining signal from the signal maintaining unit and transmit the input pulse maintaining signal; and a control unit configured to output the transmission control signal to the signal transmission unit to receive and store the received pulse maintaining signal.