An apparatus and method for mapping timer channels to protection groups. One embodiment of the method can be implemented in a microcontroller unit (MCU) that comprises a central processing unit (CPU) coupled to a plurality of timer channels and a plurality of programmable group output disable (PTGOD) circuits. The CPU can select a first group of the timer channels to respond to an assertion of a first output disable signal from a first of the PTGOD circuits. Each timer channel of the first group can disable an output signal in response to receiving the assertion of the first output disable signal.

There is provided an information processing apparatus capable of identifying the cause of a data transfer error. The information processing apparatus for identifying a cause of occurrence of a data transfer error in data communication with a device includes: an error detection unit that detects occurrence of a data transfer error; a recording unit that records the number of detections of the data transfer error per a unit time; and an identification unit that identifies, on the basis of a trend in the number of detections of the data transfer error per the unit time, whether the cause of occurrence of the data transfer error is influence of noise or a hardware fault.

An apparatus and method for mapping timer channels to protection groups. One embodiment of the method can be implemented in a microcontroller unit (MCU) that comprises a central processing unit (CPU) coupled to a plurality of timer channels and a plurality of programmable group output disable (PTGOD) circuits. The CPU can select a first group of the timer channels to respond to an assertion of a first output disable signal from a first of the PTGOD circuits. Each timer channel of the first group can disable an output signal in response to receiving the assertion of the first output disable signal.

An apparatus and method for mapping timer channels to protection groups. One embodiment of the method can be implemented in a microcontroller unit (MCU) that comprises a central processing unit (CPU) coupled to a plurality of timer channels and a plurality of programmable group output disable (PTGOD) circuits. The CPU can select a first group of the timer channels to respond to an assertion of a first output disable signal from a first of the PTGOD circuits. Each timer channel of the first group can disable an output signal in response to receiving the assertion of the first output disable signal.

There is provided an information processing apparatus capable of identifying the cause of a data transfer error.

The information processing apparatus for identifying a cause of occurrence of a data transfer error in data communication with a device includes: an error detection unit that detects occurrence of a data transfer error; a recording unit that records the number of detections of the data transfer error per a unit time; and an identification unit that identifies, on the basis of a trend in the number of detections of the data transfer error per the unit time, whether the cause of occurrence of the data transfer error is influence of noise or a hardware fault.