Patent classifications
G05B2219/34336
Deadlock determination method and semiconductor apparatus
A deadlock determination method includes constructing a new WRG and determining a deadlock. At least a process step that includes a plurality of resources is selected from process steps in a WRG that supports transporting a single piece of material. The plurality of resources corresponding to the selected process step are combined. A total capacity of each of the process steps is changed according to a combination result to construct the new WRG that supports transporting a plurality of pieces of material. The plurality of resources include apparatuses for performing the process steps. The total capacity is a sum of a number of workstations of resources corresponding to each process step. Determining a deadlock includes determining whether a piece of material scheduling deadlock occurs based on the new WRG. The plurality of resources include apparatuses for performing the process steps.
DEADLOCK DETERMINATION METHOD AND SEMICONDUCTOR APPARATUS
A deadlock determination method includes constructing a new WRG and determining a deadlock. At least a process step that includes a plurality of resources is selected from process steps in a WRG that supports transporting a single piece of material. The plurality of resources corresponding to the selected process step are combined. A total capacity of each of the process steps is changed according to a combination result to construct the new WRG that supports transporting a plurality of pieces of material. The plurality of resources include apparatuses for performing the process steps. The total capacity is a sum of a number of workstations of resources corresponding to each process step. Determining a deadlock includes determining whether a piece of material scheduling deadlock occurs based on the new WRG. The plurality of resources include apparatuses for performing the process steps.