G05B2219/45028

Patterns on objects in additive manufacturing

In an example, a method includes operating, by a processor, on object model data and operating, on a processor, on pattern data. The object model data describes at least part of an object to be generated in additive manufacturing and the pattern data describes an object pattern intended to be formed on at least a portion of the part of the object to be generated in additive manufacturing. The method includes determining, by a processor, control data to control a print agent applicator to apply a pattern of fusing agent onto a part of a layer of build material. The pattern of fusing agent comprises a fusing agent area and a gap area that lacks fusing agent. The gap area corresponds to the object pattern such that no fusing agent is applied to a part of the layer of build material that corresponds to the object pattern.

DEVICE MANUFACTURING METHODS

A device manufacturing method, the method comprising: obtaining a measurement data time series of a plurality of substrates on which an exposure step and a process step have been performed; obtaining a status data time series relating to conditions prevailing when the process step was performed on at least some of the plurality of substrates; applying a filter to the measurement data time series and the status data time series to obtain filtered data; and determining, using the filtered data, a correction to be applied in an exposure step performed on a subsequent substrate.

MACHINE LEARNING ON OVERLAY MANAGEMENT
20230223287 · 2023-07-13 ·

The current disclosure describes techniques for managing vertical alignment or overlay in semiconductor manufacturing using machine learning. Alignments of interconnection features in a fan-out WLP process are evaluated and managed through the disclosed techniques. Big data and neural networks system are used to correlate the overlay error source factors with overlay metrology categories. The overlay error source factors include tool related overlay source factors, wafer or die related overlay source factors and processing context related overlay error source factors.

Method and system of reducing charged particle beam write time

A method for exposing a pattern in an area on a surface using a charged particle beam lithography is disclosed and includes inputting an original set of exposure information for the area. A backscatter is calculated for the area of the pattern based on the exposure information. An artificial background dose is determined for the area. The artificial background dose comprises additional exposure information and is combined with the original set of exposure information creating a modified set of exposure information. A system for exposing a pattern in an area on a surface using a charged particle beam lithography is also disclosed.

LITHOGRAPHY METHOD USING MULTI-SCALE SIMULATION, SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND EXPOSURE EQUIPMENT

There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.

Lithography method using multi-scale simulation, semiconductor device manufacturing method and exposure equipment

There are provided a lithography method capable of selecting best resist and a semiconductor device manufacturing method and exposure equipment based on the lithography method. The lithography method includes estimating a shape of a virtual resist pattern based on a multi-scale simulation for resist, forming a test resist pattern by performing exposure on selected resist based on the simulation result, comparing the test resist pattern with the virtual resist pattern, and forming a resist pattern on an object to be patterned by using the resist when an error between the test resist pattern and the virtual resist pattern is in an allowable range.

LITHOGRAPHY METHOD USING MULTISCALE SIMULATION, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND EXPOSURE EQUIPMENT BASED ON THE LITHOGRAPHY METHOD

A lithography method using a multiscale simulation includes estimating a shape of a virtual resist pattern for a selected resist based on a multiscale simulation; forming a test resist pattern by performing an exposure process on a layer formed of the selected resist; determining whether an error range between the test resist pattern and the virtual resist pattern is in an allowable range; and forming a resist pattern on a patterning object using the selected resist when the error range is in the allowable range. The multiscale simulation may use molecular scale simulation, quantum scale simulation, and a continuum scale simulation, and may model a unit lattice cell of the resist by mixing polymer chains, a photo-acid generator (PAG), and a quencher.

Methods of tuning process models

Methods of constructing a process model for simulating a characteristic of a product of lithography from patterns produced under different processing conditions. The methods use a deviation between the variation of the simulated characteristic and the variation of the measured characteristic to adjust a parameter of the process model.

PATTERNS ON OBJECTS IN ADDITIVE MANUFACTURING

In an example, a method includes operating, by a processor, on object model data and operating, on a processor, on pattern data. The object model data describes at least part of an object to be generated in additive manufacturing and the pattern data describes an object pattern intended to be formed on at least a portion of the part of the object to be generated in additive manufacturing. The method includes determining, by a processor, control data to control a print agent applicator to apply a pattern of fusing agent onto a part of a layer of build material. The pattern of fusing agent comprises a fusing agent area and a gap area that lacks fusing agent. The gap area corresponds to the object pattern such that no fusing agent is applied to a part of the layer of build material that corresponds to the object pattern.

Lithography method using multiscale simulation, and method of manufacturing semiconductor device and exposure equipment based on the lithography method

A lithography method using a multiscale simulation includes estimating a shape of a virtual resist pattern for a selected resist based on a multiscale simulation; forming a test resist pattern by performing an exposure process on a layer formed of the selected resist; determining whether an error range between the test resist pattern and the virtual resist pattern is in an allowable range; and forming a resist pattern on a patterning object using the selected resist when the error range is in the allowable range. The multiscale simulation may use molecular scale simulation, quantum scale simulation, and a continuum scale simulation, and may model a unit lattice cell of the resist by mixing polymer chains, a photo-acid generator (PAG), and a quencher.